Datasheet HMC5805ALS6 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungGaAs pHEMT MMIC 0.25 WATT POWER AMPLIFIER DC -40 GHz
Seiten / Seite10 / 10 — HMC5805ALS6. GaAs pHEMT MMIC 0.25 WATT POWER AMPLIFIER. DC - 40 GHz. …
Dateiformat / GrößePDF / 971 Kb
DokumentenspracheEnglisch

HMC5805ALS6. GaAs pHEMT MMIC 0.25 WATT POWER AMPLIFIER. DC - 40 GHz. Theory of Operation. Schematic of Architecture

HMC5805ALS6 GaAs pHEMT MMIC 0.25 WATT POWER AMPLIFIER DC - 40 GHz Theory of Operation Schematic of Architecture

Modelllinie für dieses Datenblatt

Textversion des Dokuments

HMC5805ALS6
v02.0517
GaAs pHEMT MMIC 0.25 WATT POWER AMPLIFIER DC - 40 GHz Theory of Operation
The HMC5805ALS6 is a GaAs, pHEMT, MMIC power amplifier. Its basic architecture is that of a cascode distributed amplifier which al ows for control of DC bias for a drain and two gates. The cascode distributed architecture uses a T fundamental cell consisting of a stack of two field effect transistors (FETs) with the source of the upper FET connected M to the drain of the lower FET. The fundamental cell is then duplicated several times, with a transmission line feed- ing the RFIN signal to the gates of the lower FETs and a separate transmission line interconnecting the drains of the upper FETs and routing the amplified signal to the RFOUT/VDD pin. Additional circuit design techniques are used R - S around each cell to optimize the overall performance for broadband operation. The major benefit of this architecture E is that high performance is maintained across a bandwidth far greater than what a single instance of the fundamen- tal cell would provide. Additional y, ACG1-ACG4 provide access to internal nodes which, when provided with the W recommended AC terminations to ground, ensure that the overall response remains flat across the widest possible O frequency range. A simplified Schematic of Architecture is shown in below. R & P
Schematic of Architecture
A E ACG2 IN ACG1 T-Line RFOUT/VDD S - L R IE LIF P VGG2 M A T-Line RFIN VGG1 ACG4 ACG3 For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
10
Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Typical Performance Characteristics Gain & Return Loss Gain vs. Temperature Input Return Loss vs. Temperature Output Return Loss vs. Temperature P1dB vs. Temperature Psat vs. Temperature Psat vs. Supply Voltage P1dB vs. Supply Current Psat vs. Supply Current Output IP3 vs. Temperature @ Pout = 14 dBm / Tone Output IP3 vs. Supply Voltage @ Pout = 14 dBm / Tone Output IP3 vs. Supply Currents @ Pout = 14 dBm / Tone Output IM3 @ Vdd = +10V Output IM3 @ Vdd = +11V Reverse Isolation vs. Temperature Power Compression @ 20 GHz Absolute Maximum Ratings Outline Drawing Pad Descriptions Application Circuit