Datasheet STM32WB5MMG (STMicroelectronics) - 13

HerstellerSTMicroelectronics
BeschreibungBluetooth Low Energy 5.0 and 802.15.4 module
Seiten / Seite31 / 13 — STM32WB5MMG. Layout recommendations. Reference board schematics. Figure …
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STM32WB5MMG. Layout recommendations. Reference board schematics. Figure 8. DS13252. Rev 1. page 13/31

STM32WB5MMG Layout recommendations Reference board schematics Figure 8 DS13252 Rev 1 page 13/31

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STM32WB5MMG Layout recommendations
A B C D 8 8 * * * * * 9 15 10 3 0 3 2 11 5 12 1 1 D D D E E D D D D D E H P P P P P P P P P P P P 1 of 2 7 1 7 2 4 6 8 10 12 14 16 18 20 22 24 12X R heet E L S D 4 A _ 5 1 3 5 7 9 11 13 15 17 19 21 23 E E M JP H L 1697 B M A 9:03:22 A 8 4 2 8 9 7 6 7 0 13 14 _MODU e: D D E C C C D D H D D im P P P P P P P P P P P 55 ber: T B um evision: D N R N G 32W M T 0 1 3 1 3 5 7 8 2 S 3 A 7/22/2020 C C C B 11 P P P PA PA PA PA PA P BP itle ize: ate: T S D 6 6 2 2 4 6 8 10 12 14 16 18 20 10X R E D 4 A 1 3 5 7 9 11 13 15 17 19 E JP H pins 8 9 2 0 2 4 6 9 4 10 G B B C C B P P P PA PA PA PA PA P P M D N 5M G B 31 57 60 84 86 5 32W M T _1 _2 _3 _4 _5 _9 S S S S S S 0 4 4 lace as close as poosible to D 13 14 13 E 10 14 12 10 B 5 S S S S S S P the S P B B C P C C P 5 V V V V V V P P P PA PA P P D T N A G B 2 V 9 C 3nF 1 D 2 4 6 8 1 1 B P N 10 12 14 16 18 20 10X G R G E M D 2 + eader 3x1 2 Socket T A E S S B 3 JP H 1 3 5 7 9 11 13 15 17 19 E CR2032 P P S 5M K B JP H - + M 1 3 C F A T M S _U 8 O E D A S X X S D D 32W C 3nF R D B S D D D 2 _R _R 1B V V V V V V M 0 1 B P T N T T U S G R 6 7 R 2032-S 1 6 15 12 5 15 13 11 3 5 A B B A 1 R 4 6 D C B B C C B B U P P U D S C 15 16 17 32 P P P P P PA PA P P P N
Reference board schematics
G 7 C 3nF D D 5 C P N N D G G D 4 V 4 3 3V
Figure 8.
D D 7 V R D 1 M 1 D eader 3x1 2 V B K JP H 1 2 _N _P 1 3 B B 3 4 S S U U V 0 5 , F n 0 0 1 T A B D V , 0.1% N B 10K 1 G S G C M _U 4 0 1 2 3 4 5 6 7 8 9 10 11 12 13 1 R U 5V 5M C C C C C C C C C C C C C C 3 P P P P P P P P P P P P P P 1 2 3 B 3 D 100nF, 50V C 3 N 32W 2 U 1 - 1 V 6 C L A D S E 6 5 4 3V G 1A MT U S S 12 9 8 7 49 45 36 71 83 69 22 23 24 40 13 10 _1 U _2 2 IO B IO V 0 1 2 3 4 5 6 7 8 9 0 T 6 1uF, 50V C 1 H P C C C C C C C C C C 10 11 12 13 T S 1 H P 2 6 P P P P P P P P P P C C C C O R 0 H P P P P P O 6-2P 0 H P 1 6 N 4 E P 2 4 4 E P C 3 E P D 1 2 L 3-B 2 7 3 E P N B H 2 E P 2 IO G IO S P 8 7 2 E P 1 E P U U 4 6 1 E P 5 1 D P 5 1 D P 6 7 0 E P 9 7 1 2 3 0 E P 5 4 1 D P 4 1 D P 3 6 D 3 1 D P 5 1 B P 6 3 1 D P 5 6 8 3 N 5 1 B P out SS 10nF, 50V C 2 1 D P 4 1 B P G V D 2 1 D P 6 6 7 3 _N _P PA 4 1 B P 4 1 1 D P 3 1 B P D D Y N 1 1 D P 2 8 5 3 B G 3 1 B P 0 1 D P 2 1 B P 33R 5 0 1 D P 7 7 1 4 2 1 B P 100K R D 9 D P 1 1 B P 9 D P 4 7 6 4 N D 8 D P 0 1 B P 1 1 B P N 2 G 8 D P 5 7 7 4 3985M H G 0 1 B P B 3 D in IN 2 7 D P 9 B P 7 D P 7 6 1 1 S 9 B P D U L V 2 6 D P 8 B P 6 D P 1 8 4 1 8 B P _U N 5 D P 7 B P 1 3 G 5 D P 0 8 8 1 7 B P 5V 4 D P 6 B P 4 D P 3 7 3 D P 5 B P 9 3 6 B P 3 D P 0 7 9 1 2 D P 4 B P 5 B P 2 D P 8 6 0 2 1 D P 3 B P 4 B P 1 2 3 4 5 6 7 8 9 10 11 5 D 1 D P 4 3 1 2 100nF, 50V C 0 D P 2 B P 3 B P N 0 D P 3 3 C T G 1 B P 8 4 2 B P S P D P P _N _IN U 3 4 M ID 0 B P U D D N X X 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 T T _O 4 4 B hield hield hield hield E E N N G F S S S S 4 PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA A A R 1uF, 50V C N E _105017-0001 V E e l c a t p e c e r B - o r c i M _ B S U R 3 2 1 56 55 54 53 52 50 51 28 30 29 25 26 27 85 58 59 _uB G 1 B E N S 1 U C U - 0.5% D R B 4 L T S _N _P R 1K _U 0 1 2 3 4 5 6 7 8 9 10 B B S S 13 14 15 D 5V PA PA PA PA PA PA PA PA PA PA PA U U PA PA PA N G 1 1 A B C D
DS13252
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Rev 1 page 13/31
Document Outline 1 Introduction 2 Description 3 Available peripherals 4 Pin description 5 Recommendations 5.1 Pin recommendations 5.2 Layout recommendations 5.2.1 STM32WB5MMG placement 5.2.2 Enclosure effects 5.2.3 Ground plane 5.2.4 Sensitive GPIOs 5.2.5 Four layer reference board design 6 Electrical characteristics 6.1 Operating conditions 6.2 Power consumption 6.3 RF characteristics 6.4 Antenna radiation patterns and efficiency 7 Thermal characteristics 8 Solder re-flow recommendation 9 Package information 9.1 SiP-LGA86 package information 9.1.1 Device marking for SiP-LGA86 10 Ordering information 11 Tape and reel packing 12 Certification 12.1 CE certification 12.2 FCC certification 12.3 ISED certification 12.4 JRF certification 12.5 NCC certification 12.6 SRRC certification Revision history Contents List of tables List of figures