Datasheet STDRIVE101 (STMicroelectronics) - 5

HerstellerSTMicroelectronics
BeschreibungTriple half-bridge gate driver
Seiten / Seite32 / 5 — STDRIVE101. Thermal data. 2.3. Table 3. Thermal data. Symbol. Parameter. …
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STDRIVE101. Thermal data. 2.3. Table 3. Thermal data. Symbol. Parameter. Conditions. Value. Unit. 2.4

STDRIVE101 Thermal data 2.3 Table 3 Thermal data Symbol Parameter Conditions Value Unit 2.4

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STDRIVE101 Thermal data 2.3 Thermal data Table 3. Thermal data Symbol Parameter Conditions Value Unit
R Junction-to-ambient thermal thJA resistance Natural convection, according to JESD51-2a (1) 94.5 °C/W R Junction-to-case thermal thJCtop resistance (top side) Cold plate on top, according to JESD51-12 (1) 28.4 °C/W R Junction-to-case thermal thJCbot resistance (bottom side) Cold plate on exposed pad, according to JESD51-12(1) 1.47 °C/W R Junction-to-board thermal thJB resistance According to JESD51-8(1) 14.4 °C/W Ψ Junction-to-top JT characterization parameter According to JESD51-2a(1) 0.6 °C/W Ψ Junction-to-board JB characterization parameter According to JESD51-2a(1) 14.2 °C/W 1. Simulated on a 21.2x21.2 mm board, 2s2p 1 Oz copper and four 300 µm vias below exposed pad.
2.4 Electrical sensitivity characteristics Table 4. ESD protection ratings Symbol Parameter Test Condition Class Value Unit
HBM Human Body Model Conforming to ANSI/ESDA/JEDEC JS-001-2017 H2 2 kV CDM Charge Device Model Conforming to ANSI/ESDA/JEDEC JS-002-2014 C2B 750 V
DS13472
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Rev 1 page 5/32
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data 2.4 Electrical sensitivity characteristics 3 Electrical characteristics 4 Pin description 5 Device description 5.1 Gate drivers’ characteristics 5.2 12 V LDO linear regulator 5.2.1 Bootstrap section 5.2.1.1 Power-up and wake-up 5.2.1.2 Charging time and external bootstrap diodes 5.2.2 Externally provided gate driver’s supply voltage 5.3 Control logic 5.3.1 Deadtime 5.4 Standby mode 5.5 Undervoltage protection 5.6 VDS monitoring protection 5.7 Overcurrent comparator 5.8 Thermal protection 6 ESD protection strategy 7 Application example 8 Package information 9 Ordering information Revision history Contents List of tables List of figures