Datasheet OP77 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungNext Generation OP07, Ultralow Offset Voltage Operational Amplifier
Seiten / Seite16 / 10 — OP77. Data Sheet. TEST CIRCUITS 200kΩ. TYPICAL PRECISION. OP AMP. 50Ω. …
RevisionG
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DokumentenspracheEnglisch

OP77. Data Sheet. TEST CIRCUITS 200kΩ. TYPICAL PRECISION. OP AMP. 50Ω. 10kΩ. 100kΩ. 1MΩ. IN = ±10V. OS = 4000. 10Ω. –10V. +10V. AVO 650V/mV. 2.5MΩ

OP77 Data Sheet TEST CIRCUITS 200kΩ TYPICAL PRECISION OP AMP 50Ω 10kΩ 100kΩ 1MΩ IN = ±10V OS = 4000 10Ω –10V +10V AVO 650V/mV 2.5MΩ

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OP77 Data Sheet TEST CIRCUITS 200kΩ TYPICAL PRECISION OP AMP 50Ω 10kΩ 100kΩ VY OP77 VO 1MΩ V
022
IN = ±10V VO V V X OS = 4000 V
00320-
X 10Ω –10V 0V +10V
Figure 21. Typical Offset Voltage Test Circuit
RL AVO 650V/mV 2.5MΩ RL = 2kΩ NOTES 1. GAIN NOT CONSISTANT. CAUSES NONLINEAR ERRORS. V+
026
2. AVO SPEC IS ONLY PART OF THE SOLUTION. 100Ω 2 7 3. CHECK SPECIFICATION TABLE 1 AND TABLE 2 FOR PERFORMANCE.
00320-
6 3.3kΩ OP77 OUTPUT
Figure 25. Open-Loop Gain Linearity
100Ω 3 4.7µF 4 (≈10Hz FILTER)
Actual open-loop voltage gain can vary greatly at various output
V–
voltages. All automated testers use endpoint testing and therefore
V
023
O INPUT REFERRED NOISE = 25,000
only show the average gain. This causes errors in high closed- 00320- Figure 22. Typical Low-Frequency Noise Test Circuit loop gain circuits. Because this is difficult for manufacturers to test, users should make their own evaluations. This simple test circuit makes it easy. An ideal op amp would show a horizontal
20kΩ
scope trace.
V+ 1 V 2 Y 8 7 6 INPUT OP77 OUTPUT 3 + 4
024
V–
00320- Figure 23. Optional Offset Nulling Circuit
–10V 0V +10V VX 100kΩ +18V
027 00320-
+ * 10µF 10Ω
Figure 26. Output Gain Linearity Trace
0.1µF
This is the output gain linearity trace for the new OP77. The
2 7
output trace is virtually horizontal at all points, assuring
6 OP77 3
extremely high gain accuracy. The average open-loop gain is
4 10kΩ 10kΩ
truly impressive—approximately 10,000,000.
10Ω 0.1µF * 10µF + –18V
025
NOTES *1 PER BOARD
00320- Figure 24. Burn-In Circuit Rev. G | Page 10 of 16 Document Outline Features Pin Connections General Description Table of Contents Revision History Specifications Electrical Specifications Wafer Test Limits Typical Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Test Circuits Applications Precision Current Sinks Outline Dimensions Ordering Guide