Datasheet ADN8831 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungA High Efficiency TEC Controller Solution
Seiten / Seite18 / 5 — Data Sheet. ADN8831. Parameter1 Symbol. Test. Conditions/Comments. Min. …
RevisionC
Dateiformat / GrößePDF / 465 Kb
DokumentenspracheEnglisch

Data Sheet. ADN8831. Parameter1 Symbol. Test. Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADN8831 Parameter1 Symbol Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADN8831 Parameter1 Symbol Test Conditions/Comments Min Typ Max Unit
LOGIC Controls Logic Low Output Voltage VOL TMPGD, SYNCO, IOUT = 0 A 0.2 V Logic High Output Voltage VOH TMPGD, SYNCO, IOUT = 0 A VDD − 0.2 V Logic Low Input Voltage VIL 0.2 V Logic High Input Voltage VIH 3 V Output High Impedance VDD = 5.0 V 35 Ω Output Low Impedance VDD = 5.0 V 20 Ω Output High Impedance VDD = 3.0 V 50 Ω Output Low Impedance VDD = 3.0 V 25 Ω TEC CURRENT MEASUREMENT ITEC Gain AV, ITEC (VITEC – VREF/2) / (VLFB − VCS) 25 V/V ITEC Output Range High VITEC, HIGH No load VDD − 0.05 V ITEC Output Range Low VITEC, LOW 0.05 V ITEC Input Range2 VCS, VLFB 0 VDD V ITEC Bias Voltage VITEC, B VLFB = VCS = 0 1.10 1.20 1.30 V Maximum ITEC Driving Current IOUT, TEC ±1.5 mA TEC VOLTAGE MEASUREMENT VTEC Gain AV, VTEC (VVTEC – VREF/2)/(VLFB − VSFB) 0.23 0.25 0.28 V/V VTEC Output Range2 VVTEC VDD = 5.0 V 0.05 2.5 V VTEC Bias Voltage2 VVTEC, B VLFB = VSFB = 0 V 1.20 1.25 1.35 V VTEC Output Load Resistance RVTEC IVTEC = 300 μA 35 Ω VOLTAGE LIMIT VLIM Gain AV, LIM (VLFB − VSFB)/VVLIM 5 V/V VLIM Input Range2 VVLIM 0 VDD V VLIM Input Current, Cooling IVLIM, COOL VOUT2 < VREF/2 100 nA VLIM Input Current, Heating IVLIM, HEAT VOUT2 > VREF/2 IFREQ mA VLIM Input Current Accuracy, Heating IVLIM, HEAT IVLIM/IFREQ 0.8 1.0 1.18 A/A CURRENT LIMIT ILIMC Input Voltage Range VILIMC VREF/2 VDD − 1 V ILIMH Input Voltage Range VILIMH 0.1 VREF/2 V ILIMC Limit Threshold VTH, ILIMC VITEC = 2.0 V, RS = 20 mΩ 1.98 2.0 2.02 V ILIMH Limit Threshold VTH, ILIMH VITEC = 0.5 V 0.48 0.5 0.52 V TEMPERATURE GOOD High Threshold VOUT1, TH1 IN2M tied to OUT2, VIN2P = 1.5 V 1.55 1.60 V Low Threshold VOUT1, TH2 IN2M tied to OUT2, VIN2P = 1.5 V 1.40 1.45 V 1 Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 μA). 2 Guaranteed by design or indirect test methods. 3 The ADN8831 does not work when the supply voltage is less than UVLO. Rev. C | Page 5 of 18 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY DETAILED BLOCK DIAGRAM SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OSCILLATOR CLOCK FREQUENCY Free-Run Operation External Clock Operation Connecting Multiple ADN8831 Devices OSCILLATOR CLOCK PHASE TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP SHUTDOWN MODE STANDBY MODE TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a DAC Using a Resistor Divider MAXIMUM TEC CURRENT LIMIT APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (Chop1) PID COMPENSATION AMPLIFIER (Chop2) MOSFET DRIVER AMPLIFIER OUTLINE DIMENSIONS ORDERING GUIDE