Datasheet HMC8100LP6JE (Analog Devices) - 4

HerstellerAnalog Devices
BeschreibungIntermediate Frequency Receiver, 800 MHz to 4000 MHz
Seiten / Seite27 / 4 — HMC8100LP6JE. Data Sheet. ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 …
RevisionB
Dateiformat / GrößePDF / 745 Kb
DokumentenspracheEnglisch

HMC8100LP6JE. Data Sheet. ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 MHz RF FREQUENCY RANGE. Table 2. Parameter. Min. Typ. Max

HMC8100LP6JE Data Sheet ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 MHz RF FREQUENCY RANGE Table 2 Parameter Min Typ Max

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HMC8100LP6JE Data Sheet ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 MHz RF FREQUENCY RANGE Table 2. Parameter Min Typ Max Unit
OPERATING CONDITIONS LO Frequency Range 1600 3000 MHz IF Frequency Range 80 200 MHz RF INPUT INTERFACE Input Impedance 50 Ω Return Loss 12 dB IF OUTPUT INTERFACE Input Impedance 50 Ω Return Loss 8 13 dB LO INPUT INTERFACE Input Impedance 50 Ω Return Loss 7 15 dB DYNAMIC PERFORMANCE Power Conversion Gain 77 85 dB RF VGA Dynamic Range 40 47 dB IF VGA Dynamic Range 40 49 dB Image Rejection 30 36 dBc Noise Figure at PIN (One Tone) 5 7 dB Output Third-Order Intercept (OIP3) 11 18 dBm Output 1 dB Compression Point (OP1dB) 7 11 dBm LO Leakage at the IF Input −55 −45 dBm LO Leakage at the RF Input −73 −66 dBm RF Leakage at the IF Output −73 −65 dBm POWER SUPPLY Supply Voltage VCCX 3.3 V VCC − VGA1 3.3 V Supply Current VCCX 600 mA VCC − VGA1 11 μA 1 VCC – VGA = VC_VGA_IF + VC_VGA_RF can be adjusted from 3.3 V (minimum ATTEN) to 0 V (maximum ATTEN) to control the IF and RF VGA in external AGC mode. Rev. B | Page 4 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS: 800 MHz TO 1800 MHz RF FREQUENCY RANGE ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 MHz RF FREQUENCY RANGE ELECTRICAL CHARACTERISTICS: 2800 MHz TO 4000 MHz RF FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EXTERNAL AGC CONFIGURATION INTERNAL AGC CONFIGURATION THEORY OF OPERATION REGISTER ARRAY ASSIGNMENTS AND SERIAL INTERFACE Read Example REGISTER DESCRIPTIONS REGISTER ARRAY ASSIGNMENTS Enable Bits Image Reject and Band-Pass Filter Bits Band-Pass Filter Bits: OTP and SPI AGC AGC: IF Gain Limit Bits Band-Pass Filter Bits: Calibration and 8-Bit Word Frequency AGC: Blocker Power Detector Bits Phase I Bits Phase Q Bits APPLICATIONS INFORMATION SCHEMATIC/TYPICAL APPLICATION CIRCUIT EVALUATION PRINTED CIRCUIT BOARD (PCB) OUTLINE DIMENSIONS ORDERING GUIDE