Datasheet ADRV9008-1 (Analog Devices) - 2
| Hersteller | Analog Devices |
| Beschreibung | Integrated Dual RF Receiver |
| Seiten / Seite | 68 / 2 — ADRV9008-1. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. … |
| Dateiformat / Größe | PDF / 1.9 Mb |
| Dokumentensprache | Englisch |
ADRV9008-1. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 9/2018—Revision 0: Initial Version
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ADRV9008-1 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 47 Applications ... 1 Receivers .. 47 General Description ... 1 Clock Input .. 47 Revision History ... 2 Synthesizers ... 47 Functional Block Diagram .. 3 SPI ... 47 Specifications ... 4 JTAG Boundary Scan ... 47 Current and Power Consumption Specifications ... 8 Power Supply Sequence ... 47 Timing Diagrams .. 9 GPIO_x Pins ... 48 Absolute Maximum Ratings .. 10 Auxiliary Converters .. 48 Reflow Profile .. 10 JESD204B Data Interface .. 48 Thermal Management ... 10 Applications Information .. 49 Thermal Resistance .. 10 PCB Layout and Power Supply Recommendations ... 49 ESD Caution .. 10 PCB Material and Stackup Selection ... 49 Pin Configuration and Function Descriptions ... 11 Fanout and Trace Space Guidelines ... 51 Typical Performance Characteristics ... 17 Component Placement and Routing Guidelines ... 52 75 MHz to 525 MHz Band .. 17 RF and JESD204B Transmission Line Layout .. 58 650 MHz to 3000 MHz Band .. 25 Isolation Techniques Used on the ADRV9008-1W/PCBZ ... 60 3400 MHz to 4800 MHz Band .. 33 RF Port Interface Information .. 61 5100 MHz to 5900 MHz Band .. 40 Outline Dimensions ... 68 Receiver Input Impedance... 45 Ordering Guide .. 68 Terminology .. 46
REVISION HISTORY 9/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 68 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Management Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 75 MHz to 525 MHz Band 650 MHz to 3000 MHz Band 3400 MHz to 4800 MHz Band 5100 MHz to 5900 MHz Band Receiver Input Impedance Terminology Theory of Operation Receivers Clock Input Synthesizers RF PLL Clock PLL SPI JTAG Boundary Scan Power Supply Sequence GPIO_x Pins Auxiliary Converters AUXADC_x Auxiliary DAC x JESD204B Data Interface Applications Information PCB Layout and Power Supply Recommendations Overview PCB Material and Stackup Selection Fanout and Trace Space Guidelines Component Placement and Routing Guidelines Signals with Highest Routing Priority Signals with Second Routing Priority Signals with Lowest Routing Priority RF and JESD204B Transmission Line Layout RF Routing Guidelines JESD204B Trace Routing Recommendations Routing Recommendations Stripline Transmission Lines vs. Microstrip Transmission Lines Isolation Techniques Used on the ADRV9008-1W/PCBZ Isolation Goals Isolation Between JESD204B Lines RF Port Interface Information RF Port Impedance Data Advanced Design System (ADS) Setup Using the DataAccessComponent and SEDZ File General Receiver Path Interface Impedance Matching Network Examples Outline Dimensions Ordering Guide
ADRV9008-1 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 47 Applications ... 1 Receivers .. 47 General Description ... 1 Clock Input .. 47 Revision History ... 2 Synthesizers ... 47 Functional Block Diagram .. 3 SPI ... 47 Specifications ... 4 JTAG Boundary Scan ... 47 Current and Power Consumption Specifications ... 8 Power Supply Sequence ... 47 Timing Diagrams .. 9 GPIO_x Pins ... 48 Absolute Maximum Ratings .. 10 Auxiliary Converters .. 48 Reflow Profile .. 10 JESD204B Data Interface .. 48 Thermal Management ... 10 Applications Information .. 49 Thermal Resistance .. 10 PCB Layout and Power Supply Recommendations ... 49 ESD Caution .. 10 PCB Material and Stackup Selection ... 49 Pin Configuration and Function Descriptions ... 11 Fanout and Trace Space Guidelines ... 51 Typical Performance Characteristics ... 17 Component Placement and Routing Guidelines ... 52 75 MHz to 525 MHz Band .. 17 RF and JESD204B Transmission Line Layout .. 58 650 MHz to 3000 MHz Band .. 25 Isolation Techniques Used on the ADRV9008-1W/PCBZ ... 60 3400 MHz to 4800 MHz Band .. 33 RF Port Interface Information .. 61 5100 MHz to 5900 MHz Band .. 40 Outline Dimensions ... 68 Receiver Input Impedance... 45 Ordering Guide .. 68 Terminology .. 46
REVISION HISTORY 9/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 68 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Management Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 75 MHz to 525 MHz Band 650 MHz to 3000 MHz Band 3400 MHz to 4800 MHz Band 5100 MHz to 5900 MHz Band Receiver Input Impedance Terminology Theory of Operation Receivers Clock Input Synthesizers RF PLL Clock PLL SPI JTAG Boundary Scan Power Supply Sequence GPIO_x Pins Auxiliary Converters AUXADC_x Auxiliary DAC x JESD204B Data Interface Applications Information PCB Layout and Power Supply Recommendations Overview PCB Material and Stackup Selection Fanout and Trace Space Guidelines Component Placement and Routing Guidelines Signals with Highest Routing Priority Signals with Second Routing Priority Signals with Lowest Routing Priority RF and JESD204B Transmission Line Layout RF Routing Guidelines JESD204B Trace Routing Recommendations Routing Recommendations Stripline Transmission Lines vs. Microstrip Transmission Lines Isolation Techniques Used on the ADRV9008-1W/PCBZ Isolation Goals Isolation Between JESD204B Lines RF Port Interface Information RF Port Impedance Data Advanced Design System (ADS) Setup Using the DataAccessComponent and SEDZ File General Receiver Path Interface Impedance Matching Network Examples Outline Dimensions Ordering Guide