Datasheet VIPER222 (STMicroelectronics) - 10
| Hersteller | STMicroelectronics |
| Beschreibung | High voltage converter |
| Seiten / Seite | 20 / 10 — VIPER222. Burst mode at light load. 6.4. 6.5. Short-circuit protection. … |
| Dateiformat / Größe | PDF / 661 Kb |
| Dokumentensprache | Englisch |
VIPER222. Burst mode at light load. 6.4. 6.5. Short-circuit protection. 6.6. VCC clamp protection. DS13192. Rev 2. page 10/20
Modelllinie für dieses Datenblatt
Textversion des Dokuments
link to page 9
VIPER222 Burst mode at light load
Thanks to this protection, each time the DRAIN peak current exceeds ILIM level within tON_MIN, one switching cycle is skipped. The cycles can be skipped until the minimum switching frequency FOSCmin (15 kHz typ.) is reached. Each time the DRAIN peak current does not exceed ILIM within tON_MIN, one switching cycle is restored. The cycles can be restored until the nominal switching frequency is reached, FOSC (30 or 60 kHz).
6.4 Burst mode at light load
When the load decreases, the feedback loop reacts lowering the EA-OUT pin voltage. If it goes below the VEA-BM threshold, the DRAIN peak current is reduced to ILIM_BM, avoiding audible noise which could arise from low switching frequency. When the load is increased, VEA_OUT increases. As it reaches the VEA_SAT threshold, the DRAIN peak current reaches its maximum value, ILIM.
6.5 Short-circuit protection
In case of overload or short-circuit on the output, the IC runs at ILIM. If this condition is removed before 50ms, the IC continues its normal operation. If this condition lasts for tOVL (50ms, typ.), the protection is tripped, the device stops switching for tRESTART (1 sec. typ.), then resumes switching with soft-start phase. If the fault is still present, after tOVL, the IC is disabled again for tRESTART; otherwise it resumes normal operation. If the converter is definitively operated at FOSC_MIN, (see Section 6.3 ), the overload time will increase to tOVL_MAX (100 ms typ. for VIPER222XSTR; 200 ms typ. for VIPER222LSTR). During the fault event, the VCC voltage is maintained between VCCL (4.25 V) and VON (16 V) by the periodical activation of the high voltage current source.
6.6 VCC clamp protection
If VCC reaches the clamp level VCLAMP and the current injected into the pin exceeds the internal threshold ICC_FAIL for more than tCC_FAIL, a fault condition is detected. The PWM is disabled for tRESTART and then activated again in soft-start phase. The protection is disabled during the soft-start time.
DS13192
-
Rev 2 page 10/20
Document Outline Cover image Product status link / summary Features Application Description 1 Pin setting 2 Typical power capability 3 Electrical and thermal ratings 4 Electrical characteristics 5 Typical electrical characteristics 6 General description 6.1 Startup 6.2 Feedback loop 6.3 Pulse skipping 6.4 Burst mode at light load 6.5 Short-circuit protection 6.6 VCC clamp protection 7 Basic application schematics 8 Package information 8.1 SSOP10 package information Revision history Contents List of tables List of figures
VIPER222 Burst mode at light load
Thanks to this protection, each time the DRAIN peak current exceeds ILIM level within tON_MIN, one switching cycle is skipped. The cycles can be skipped until the minimum switching frequency FOSCmin (15 kHz typ.) is reached. Each time the DRAIN peak current does not exceed ILIM within tON_MIN, one switching cycle is restored. The cycles can be restored until the nominal switching frequency is reached, FOSC (30 or 60 kHz).
6.4 Burst mode at light load
When the load decreases, the feedback loop reacts lowering the EA-OUT pin voltage. If it goes below the VEA-BM threshold, the DRAIN peak current is reduced to ILIM_BM, avoiding audible noise which could arise from low switching frequency. When the load is increased, VEA_OUT increases. As it reaches the VEA_SAT threshold, the DRAIN peak current reaches its maximum value, ILIM.
6.5 Short-circuit protection
In case of overload or short-circuit on the output, the IC runs at ILIM. If this condition is removed before 50ms, the IC continues its normal operation. If this condition lasts for tOVL (50ms, typ.), the protection is tripped, the device stops switching for tRESTART (1 sec. typ.), then resumes switching with soft-start phase. If the fault is still present, after tOVL, the IC is disabled again for tRESTART; otherwise it resumes normal operation. If the converter is definitively operated at FOSC_MIN, (see Section 6.3 ), the overload time will increase to tOVL_MAX (100 ms typ. for VIPER222XSTR; 200 ms typ. for VIPER222LSTR). During the fault event, the VCC voltage is maintained between VCCL (4.25 V) and VON (16 V) by the periodical activation of the high voltage current source.
6.6 VCC clamp protection
If VCC reaches the clamp level VCLAMP and the current injected into the pin exceeds the internal threshold ICC_FAIL for more than tCC_FAIL, a fault condition is detected. The PWM is disabled for tRESTART and then activated again in soft-start phase. The protection is disabled during the soft-start time.
DS13192
-
Rev 2 page 10/20
Document Outline Cover image Product status link / summary Features Application Description 1 Pin setting 2 Typical power capability 3 Electrical and thermal ratings 4 Electrical characteristics 5 Typical electrical characteristics 6 General description 6.1 Startup 6.2 Feedback loop 6.3 Pulse skipping 6.4 Burst mode at light load 6.5 Short-circuit protection 6.6 VCC clamp protection 7 Basic application schematics 8 Package information 8.1 SSOP10 package information Revision history Contents List of tables List of figures