Datasheet STUSB4500L (STMicroelectronics) - 6
| Hersteller | STMicroelectronics |
| Beschreibung | Standalone USB Type-C sink port controller |
| Seiten / Seite | 32 / 6 — STUSB4500L. Pin description. 2.2.5. DISCH. 2.2.6. GND. 2.2.7. ATTACH. … |
| Dateiformat / Größe | PDF / 1.8 Mb |
| Dokumentensprache | Englisch |
STUSB4500L. Pin description. 2.2.5. DISCH. 2.2.6. GND. 2.2.7. ATTACH. 2.2.8. RP_3A/RP_1A5. Table 4. Source current capability. Pin name. Value
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STUSB4500L Pin description 2.2.5 DISCH
This input/output pin can be used to implement a discharge path for highly capacitive VBUS line on power system side. When used as input, the discharge is internal and a serial resistor must connected to the pin to limit the discharge current through the pin. Maximum discharge current is 500 mA. The pin can be also used as an open drain output to control an external VBUS discharge path when higher discharge current is required by the application, for instance. The pin is activated at the same time as the internal discharge path on VBUS_VS_DISCH pin. The discharge is activated automatically during cable disconnection and error recovery state. The discharge time is programmable by NVM (see Section 5 Start-up configuration).
2.2.6 GND
Ground.
2.2.7 ATTACH
This pin is asserted when a valid source-to-sink connection is established. It is also asserted when a connection to a debug accessory device is detected.
2.2.8 RP_3A/RP_1A5
These pins report by default the status of the USB source current capabilities.
Table 4. Source current capability Pin name Value Description
Hi-Z No source attached VBUS_EN_SNK 0 Source attached Hi-Z No source attached or source supplies default USB Type-C current at 5 V RP_3A 0 Source supplies 3.0 A USB Type-C current at 5 V Hi-Z No source attached or source supplies default USB Type-C current at 5 V. RP_1A5 0 Source supplies 1.5 A USB Type-C current at 5 V. Note: RP_3A and RP_1A5 signals are valid when a SOURCE is attached.
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Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Functional description 1.1 Block overview 2 Inputs/outputs 2.1 Pinout 2.2 Pin description 2.2.1 CC1 / CC2 2.2.2 CC1DB / CC2DB 2.2.3 RESET 2.2.4 I²C interface pins 2.2.5 DISCH 2.2.6 GND 2.2.7 ATTACH 2.2.8 RP_3A/RP_1A5 2.2.9 GPIO 2.2.10 VBUS_EN_SNK 2.2.11 A_B_SIDE 2.2.12 VBUS_VS_DISCH 2.2.13 VREG_1V2 2.2.14 VSYS 2.2.15 VREG_2V7 2.2.16 VDD 3 Description of the features 3.1 CC interface 3.2 VBUS power path control 3.2.1 VBUS monitoring 3.2.2 VBUS discharge 3.2.3 VBUS power path assertion 3.3 Dead battery mode 3.4 High voltage protections 3.5 Hardware fault management 3.6 Debug accessory mode detection 4 I²C Interface 4.1 Read and write operations 4.2 Timing specifications 5 Start-up configuration 5.1 User-defined parameters 5.2 Default start-up configuration 6 Application 6.1 General information 6.1.1 Power supplies 6.1.2 Connection to MCU or application processor 6.2 Typical application 7 Electrical characteristics 7.1 Absolute maximum ratings 7.2 Operating conditions 7.3 Electrical and timing characteristics 8 Package information 8.1 QFN-24 EP (4x4) package information 8.2 WLCSP (2.6x2.6x0.5) 25 bumps package information 8.3 Thermal information 9 Terms and abbreviations Revision history
STUSB4500L Pin description 2.2.5 DISCH
This input/output pin can be used to implement a discharge path for highly capacitive VBUS line on power system side. When used as input, the discharge is internal and a serial resistor must connected to the pin to limit the discharge current through the pin. Maximum discharge current is 500 mA. The pin can be also used as an open drain output to control an external VBUS discharge path when higher discharge current is required by the application, for instance. The pin is activated at the same time as the internal discharge path on VBUS_VS_DISCH pin. The discharge is activated automatically during cable disconnection and error recovery state. The discharge time is programmable by NVM (see Section 5 Start-up configuration).
2.2.6 GND
Ground.
2.2.7 ATTACH
This pin is asserted when a valid source-to-sink connection is established. It is also asserted when a connection to a debug accessory device is detected.
2.2.8 RP_3A/RP_1A5
These pins report by default the status of the USB source current capabilities.
Table 4. Source current capability Pin name Value Description
Hi-Z No source attached VBUS_EN_SNK 0 Source attached Hi-Z No source attached or source supplies default USB Type-C current at 5 V RP_3A 0 Source supplies 3.0 A USB Type-C current at 5 V Hi-Z No source attached or source supplies default USB Type-C current at 5 V. RP_1A5 0 Source supplies 1.5 A USB Type-C current at 5 V. Note: RP_3A and RP_1A5 signals are valid when a SOURCE is attached.
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Rev 2 page 6/32
Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Functional description 1.1 Block overview 2 Inputs/outputs 2.1 Pinout 2.2 Pin description 2.2.1 CC1 / CC2 2.2.2 CC1DB / CC2DB 2.2.3 RESET 2.2.4 I²C interface pins 2.2.5 DISCH 2.2.6 GND 2.2.7 ATTACH 2.2.8 RP_3A/RP_1A5 2.2.9 GPIO 2.2.10 VBUS_EN_SNK 2.2.11 A_B_SIDE 2.2.12 VBUS_VS_DISCH 2.2.13 VREG_1V2 2.2.14 VSYS 2.2.15 VREG_2V7 2.2.16 VDD 3 Description of the features 3.1 CC interface 3.2 VBUS power path control 3.2.1 VBUS monitoring 3.2.2 VBUS discharge 3.2.3 VBUS power path assertion 3.3 Dead battery mode 3.4 High voltage protections 3.5 Hardware fault management 3.6 Debug accessory mode detection 4 I²C Interface 4.1 Read and write operations 4.2 Timing specifications 5 Start-up configuration 5.1 User-defined parameters 5.2 Default start-up configuration 6 Application 6.1 General information 6.1.1 Power supplies 6.1.2 Connection to MCU or application processor 6.2 Typical application 7 Electrical characteristics 7.1 Absolute maximum ratings 7.2 Operating conditions 7.3 Electrical and timing characteristics 8 Package information 8.1 QFN-24 EP (4x4) package information 8.2 WLCSP (2.6x2.6x0.5) 25 bumps package information 8.3 Thermal information 9 Terms and abbreviations Revision history