Datasheet AD73322 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungLow Cost, Low Power CMOS General-Purpose Dual Analog Front End
Seiten / Seite43 / 10 — AD73322. ABSOLUTE MAXIMUM RATINGS*. ORDERING GUIDE. Temperature. Package. …
RevisionB
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DokumentenspracheEnglisch

AD73322. ABSOLUTE MAXIMUM RATINGS*. ORDERING GUIDE. Temperature. Package. Model. Range. Descriptions. Options. PIN CONFIGURATIONS

AD73322 ABSOLUTE MAXIMUM RATINGS* ORDERING GUIDE Temperature Package Model Range Descriptions Options PIN CONFIGURATIONS

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AD73322 ABSOLUTE MAXIMUM RATINGS* ORDERING GUIDE
(TA = +25°C unless otherwise noted) AVDD, DVDD to GND . –0.3 V to +7 V
Temperature Package Package
AGND to DGND . –0.3 V to +0.3 V
Model Range Descriptions Options
Digital I/O Voltage to DGND . –0.3 V to DVDD + 0.3 V AD73322AR –40°C to +85°C Wide Body SOIC R-28 Analog I/O Voltage to AGND . –0.3 V to AVDD + 0.3 V AD73322AST –40°C to +85°C Plastic Thin Quad ST-44A Operating Temperature Range Flatpack (LQFP) Industrial (A Version) . –40°C to +85°C EVAL-AD73322EB Evaluation Board1 Storage Temperature Range . –65°C to +150°C +EZ-KIT Lite Upgrade2 Maximum Junction Temperature . +150°C EVAL-AD73322EZ Evaluation Board1 SOIC, θJA Thermal Impedance . 71.4°C/W +EZ-KIT Lite3 Lead Temperature, Soldering NOTES Vapor Phase (60 sec) . +215°C 1The AD73322 evaluation board features a selectable number of codecs in Infrared (15 sec) . +220°C cascade (from 1 to 4). It can be interfaced to an ADSP-2181 EZ-KIT Lite or to LQFP, θ a Texas Instruments EVM kit. JA Thermal Impedance . 53.2°C/W 2The upgrade consists of a connector that is used to connect the EZ-KIT to the Lead Temperature, Soldering AD73322 evaluation board. This option is intended for owners of the EZ-KIT Vapor Phase (60 sec) . +215°C Lite. Infrared (15 sec) . +220°C 3The EZ-KIT Lite has been modified to allow it to interface with the AD73322 evaluation board. This option is intended for users who do not already have an *Stresses above those listed under Absolute Maximum Ratings may cause perma- EZ-KIT Lite. nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS 28-Lead Wide Body SOIC 44-Lead Plastic Thin Quad Flatpack (LQFP) (R-28) (ST-44A) VINP1 1 28 VFBN2 NC VFBN1 VINN1 VFBP1 VINP1 NC VFBN2 VINN2 VFBP2 VINP2 NC VFBP1 2 27 VINN2 44 43 42 41 40 39 38 37 36 35 34 VINN1 3 26 VFBP2 REFOUT 33 NC 4 VFBN1 25 VINP2 1 PIN 1 REFCAP IDENTIFIER 32 VOUTN1 5 2 REFOUT 24 VOUTN1 REFCAP 6 23 VOUTP1 AVDD2 3 31 VOUTP1 AD73322 7 AVDD2 AVDD2 4 30 NC TOP VIEW 22 VOUTN2 (Not to Scale) AGND2 8 21 VOUTP2 AGND2 5 29 VOUTN2 AD73322 DGND 9 20 AVDD1 AGND2 6 TOP VIEW 28 VOUTP2 (Not to Scale) DVDD 10 19 AGND1 AGND2 7 27 NC RESET 11 18 SE AGND2 8 26 AVDD1 SCLK 12 17 SDI DGND 9 25 AVDD1 MCLK 13 16 SDIFS DGND 10 24 AGND1 SDO 14 15 SDOFS DVDD 11 23 AGND1 12 13 14 15 16 17 18 19 20 21 22 NC NC SDI SE NC SDO SCLK MCLK SDIFS RESET SDOFS NC = NO CONNECT
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