Datasheet ADAU1328 (Analog Devices) - 16
| Hersteller | Analog Devices |
| Beschreibung | 2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec |
| Seiten / Seite | 32 / 16 — ADAU1328. Data Sheet. Table 11. Pin Function Changes in TDM and AUX Modes … |
| Revision | B |
| Dateiformat / Größe | PDF / 431 Kb |
| Dokumentensprache | Englisch |
ADAU1328. Data Sheet. Table 11. Pin Function Changes in TDM and AUX Modes Mnemonic. Stereo Modes. TDM Modes. AUX Modes. ALRCLK. ABCLK
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ADAU1328 Data Sheet Table 11. Pin Function Changes in TDM and AUX Modes Mnemonic Stereo Modes TDM Modes AUX Modes
ASDATA1 ADC1 Data Out ADC TDM Data Out TDM Data Out ASDATA2 ADC2 Data Out ADC TDM Data In AUX Data Out 1 (to External DAC 1) DSDATA1 DAC1 Data In DAC TDM Data In TDM Data In DSDATA2 DAC2 Data In DAC TDM Data Out AUX Data In 1 (from External ADC 1) DSDATA3 DAC3 Data In DAC TDM Data In 2 (Dual-Line Mode) AUX Data In 2 (from External ADC 2) DSDATA4 DAC4 Data In DAC TDM Data Out 2 (Dual-Line Mode) AUX Data Out 2 (to External DAC 2) ALRCLK ADC LRCLK In/Out ADC TDM Frame Sync In/Out TDM Frame Sync In/Out ABCLK ADC BCLK In/Out ADC TDM BCLK In/Out TDM BCLK In/Out DLRCLK DAC LRCLK In/Out DAC TDM Frame Sync In/Out AUX LRCLK In/Out DBCLK DAC BCLK In/Out DAC TDM BCLK In/Out AUX BCLK In/Out
ALRCLK ABCLK AUXILIARY DAC CHANNELS WILL APPEAR AT UNUSED SLOTS 8-ON-CHIP DAC CHANNELS AUX DAC PORTS DSDATA1 (TDM_IN) EMPTY EMPTY EMPTY EMPTY DAC L1 DAC R1 DAC L2 DAC R2 DAC L3 DAC R3 DAC L4 DAC R4 AUX L1 AUX R1 AUX L2 AUX R2 32 BITS MSB DLRCLK LEFT RIGHT (AUX PORT) DBCLK (AUX PORT) ASDATA2 MSB MSB (AUX1_OUT)
051
DSDATA4 MSB MSB (AUX2_OUT)
06102- Figure 14. 16-Channel DAC TDM-AUX Mode Rev. B | Page 16 of 32 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Test Conditions Analog Performance Specifications Crystal Oscillator Specifications Digital Input/Output Specifications Power Supply Specifications Digital Filters Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Analog-to-Digital Converters (ADCs) Digital-to-Analog Converters (DACs) Clock Signals Reset and Power-Down Serial Control Port Power Supply and Voltage Reference Serial Data Ports—Data Format Time-Division Multiplexed (TDM) Modes Daisy-Chain Mode Control Registers Definitions PLL and Clock Control Registers DAC Control Registers ADC Control Registers Additional Modes Application Circuits Outline Dimensions Ordering Guide
ASDATA1 ADC1 Data Out ADC TDM Data Out TDM Data Out ASDATA2 ADC2 Data Out ADC TDM Data In AUX Data Out 1 (to External DAC 1) DSDATA1 DAC1 Data In DAC TDM Data In TDM Data In DSDATA2 DAC2 Data In DAC TDM Data Out AUX Data In 1 (from External ADC 1) DSDATA3 DAC3 Data In DAC TDM Data In 2 (Dual-Line Mode) AUX Data In 2 (from External ADC 2) DSDATA4 DAC4 Data In DAC TDM Data Out 2 (Dual-Line Mode) AUX Data Out 2 (to External DAC 2) ALRCLK ADC LRCLK In/Out ADC TDM Frame Sync In/Out TDM Frame Sync In/Out ABCLK ADC BCLK In/Out ADC TDM BCLK In/Out TDM BCLK In/Out DLRCLK DAC LRCLK In/Out DAC TDM Frame Sync In/Out AUX LRCLK In/Out DBCLK DAC BCLK In/Out DAC TDM BCLK In/Out AUX BCLK In/Out
ALRCLK ABCLK AUXILIARY DAC CHANNELS WILL APPEAR AT UNUSED SLOTS 8-ON-CHIP DAC CHANNELS AUX DAC PORTS DSDATA1 (TDM_IN) EMPTY EMPTY EMPTY EMPTY DAC L1 DAC R1 DAC L2 DAC R2 DAC L3 DAC R3 DAC L4 DAC R4 AUX L1 AUX R1 AUX L2 AUX R2 32 BITS MSB DLRCLK LEFT RIGHT (AUX PORT) DBCLK (AUX PORT) ASDATA2 MSB MSB (AUX1_OUT)
051
DSDATA4 MSB MSB (AUX2_OUT)
06102- Figure 14. 16-Channel DAC TDM-AUX Mode Rev. B | Page 16 of 32 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Test Conditions Analog Performance Specifications Crystal Oscillator Specifications Digital Input/Output Specifications Power Supply Specifications Digital Filters Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Analog-to-Digital Converters (ADCs) Digital-to-Analog Converters (DACs) Clock Signals Reset and Power-Down Serial Control Port Power Supply and Voltage Reference Serial Data Ports—Data Format Time-Division Multiplexed (TDM) Modes Daisy-Chain Mode Control Registers Definitions PLL and Clock Control Registers DAC Control Registers ADC Control Registers Additional Modes Application Circuits Outline Dimensions Ordering Guide