Datasheet BTA24, BTB24, BTA25 BTA26, BTB26, T25 (STMicroelectronics) - 10

HerstellerSTMicroelectronics
Beschreibung25 A standard and Snubberless triacs
Seiten / Seite12 / 10 — Package information. BTA24, BTB24, BTA25, BTA26, BTB26, T25. Table 10. …
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Package information. BTA24, BTB24, BTA25, BTA26, BTB26, T25. Table 10. TO-220AB (insulated and non-insulated) dimensions

Package information BTA24, BTB24, BTA25, BTA26, BTB26, T25 Table 10 TO-220AB (insulated and non-insulated) dimensions

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Package information BTA24, BTB24, BTA25, BTA26, BTB26, T25 Table 10. TO-220AB (insulated and non-insulated) dimensions DIMENSIONS REF. Millimeters Inches Min. Typ. Max. Min. Typ. Max.
A 15.20 15.90 0.598 0.625 a1 3.75 0.147
B C
a2 13.00 14.00 0.511 0.551
Ø I b2
B 10.00 10.40 0.393 0.409
L F
b1 0.61 0.88 0.024 0.034
A
b2 1.23 1.32 0.048 0.051
I4
C 4.40 4.60 0.173 0.181
l3 c2 a1
c1 0.49 0.70 0.019 0.027
l2
c2 2.40 2.72 0.094 0.107
a2
e 2.40 2.70 0.094 0.106
M c1
F 6.20 6.60 0.244 0.259
b1 e
ØI 3.75 3.85 0.147 0.151 I4 15.80 16.40 16.80 0.622 0.646 0.661 L 2.65 2.95 0.104 0.116 l2 1.14 1.70 0.044 0.066 l3 1.14 1.70 0.044 0.066 M 2.60 0.102 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 10/12 Document Outline Table 1. Device summary 1 Characteristics Table 2. Absolute maximum ratings Table 3. Electrical characteristics (Tj = 25˚ C, unless otherwise specified), Snubberless and logic level (3 quadrants) T25, BTA/BTB24...W, BTA25...W, BTA26...W Table 4. Electrical characteristics (Tj = 25˚ C, unless otherwise specified), standard (4 quadrants), BTB24...B, BTA25...B, BTA26...B, BTB26...B Table 5. Static characteristics Table 6. Thermal resistance Figure 1. Maximum power dissipation versus RMS on-state current (full cycle) Figure 2. RMS on-state current versus case temperature (full cycle) Figure 3. D2PAK RMS on-state current versus ambient temperature (printed circuit board FR4, copper thickness: 35µm) (full cycle) Figure 4. Relative variation of thermal impedance versus pulse duration Figure 5. On-state characteristics (maximum values) Figure 6. Surge peak on-state current versus number of cycles Figure 7. Non-repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms and corresponding value of I2t Figure 8. Relative variation of gate trigger current, holding current and latching current versus junction temperature (typical values) Figure 9. Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values) Figure 10. Relative variation of critical rate of decrease of main current versus Tj Figure 11. D2PAK thermal resistance junction to ambient versus copper surface under tab (printed circuit board FR4, copper thickness: 35 µm) 2 Ordering information scheme Figure 12. BTA and BTB series Figure 13. T25 series 3 Package information Table 7. D2PAK dimensions Figure 14. D2PAK footprint dimensions (in millimeters) Table 8. RD91 dimensions Table 9. TOP3 (insulated and non_insulated) dimensions Table 10. TO-220AB (insulated and non-insulated) dimensions 4 Ordering information Table 11. Ordering information 5 Revision history Table 12. Revision history