Datasheet AD603 (Analog Devices) - 18

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AD603 Data Sheet APPLICATIONS INFORMATION A LOW NOISE AGC AMPLIFIER
The circuit operates as follows: Figure 49 shows the ease with which the AD603 can be A1 and A2 are cascaded. connected as an AGC amplifier. The circuit illustrates many of Capacitor C1 and the 100 Ω of resistance at the input of A1 the points previously discussed: it uses few parts, has linear-in- form a time constant of 10 μs. dB gain, operates from a single supply, uses two cascaded amplifiers in sequential gain mode for maximum SNR, and an external C2 blocks the small dc offset voltage at the output of A1 resistor programs each gain of the amplifier. It also uses a (which might otherwise saturate A2 at its maximum gain) simple temperature-compensated detector. and introduces a high-pass corner at about 16 kHz, eliminating low frequency noise. The circuit operates from a single 10 V supply. Resistors R1, R2, R3, and R4 bias the common pins of A1 and A2 at 5 V. The A half-wave detector is used, based on Q1 and R8. The current common pin is a low impedance point and must have a low into capacitor, CAV, is the difference between the collector impedance path to ground, provided here by the 100 μF tantalum current of Q2 (biased to be 300 μA at 300 K, 27°C) and the capacitors and the 0.1 μF ceramic capacitors. collector current of Q1, which increases with the amplitude of the output signal. The cascaded amplifiers operate in sequential gain. Here, the offset voltage between Pin 2 (GNEG) of A1 and A2 is 1.05 V The automatic gain control voltage, VAGC, is the time integral (42.14 dB × 25 mV/dB), provided by a voltage divider consisting of of this error current. For VAGC (and thus the gain) to remain Resistors R5, R6, and R7. Using standard values, the offset is not insensitive to short-term amplitude fluctuations in the output exact, but it is not critical for this application. signal, the rectified current in Q1 must, on average, exactly balance the current in Q2. If the output of A2 is too small to The gain of both A1 and A2 is programmed by Resistors R13 do this, VAGC increases, causing the gain to increase until Q1 and R14, respectively, to be about 42 dB; therefore, the maximum conducts sufficiently. gain of the circuit is twice that, or 84 dB. The gain control range can be shifted up by as much as 20 dB by appropriate choices of Consider the case where R8 is zero and the output voltage VOUT R13 and R14. is a square wave at, for example, 455 kHz, which is well above the corner frequency of the control loop.
10V R 9 C11 THIS CAPACITOR SETS R1 0 1.54kΩ 0.1µF AGC TIME CONSTANT 1.24kΩ C7 Q2 0.1µF V 10V AGC 2N3906 C8 R11 R1 3 0.1µF 10V 3.83kΩ C1 2.49kΩ CAV 0.1µF 8 R1 4 0.1µF Q1 5V J 1 3 6 C2 2N3904 2.49kΩ 5 0.1µF 8 C9 R T1 R1 2 A1 10V R 8 0.1µF 100Ω 6 AD603 7 3 806Ω 4.99kΩ 2 A2 5 4 10V R1 7 J 2 AD603 2.49kΩ 1 2 C10 R3 4 0.1µF + C 32 C4 R 2 2.49kΩ 1 100µF 0.1µF 2.49kΩ + C52 C 6 R4 100µF 0.1µF 2.49kΩ AGC LINE R 5 1V OFFSET FOR R7 5.49kΩ SEQUENTIAL GAIN 3.48kΩ 10V 5.5V R6 6.5V 1.05kΩ
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1
0
RT PR OVIDES A 5 0Ω IN PUT IMPED ANC E.
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2 C3 AND C5 ARE TANTALUM.
53 00 Figure 49. A Low Noise AGC Amplifier Rev. K | Page 18 of 24 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Theory of Operation Noise Performance The Gain Control Interface Programming the Fixed-Gain Amplifier Using Pin Strapping Using the AD603 in Cascade Sequential Mode (Optimal SNR) Parallel Mode (Simplest Gain Control Interface) Low Gain Ripple Mode (Minimum Gain Error) Applications Information A Low Noise AGC Amplifier Caution Evaluation Board Outline Dimensions Ordering Guide