Datasheet AD9272 (Analog Devices) - 2

HerstellerAnalog Devices
BeschreibungOctal LNA/VGA/AAF/ADC and Crosspoint Switch
Seiten / Seite44 / 2 — AD9272. TABLE OF CONTENTS. REVISION HISTORY. 7/09—Rev. B to Rev. C. …
RevisionC
Dateiformat / GrößePDF / 994 Kb
DokumentenspracheEnglisch

AD9272. TABLE OF CONTENTS. REVISION HISTORY. 7/09—Rev. B to Rev. C. 6/09—Rev. A to Rev. B. 4/09—Revision A: Initial Version

AD9272 TABLE OF CONTENTS REVISION HISTORY 7/09—Rev B to Rev C 6/09—Rev A to Rev B 4/09—Revision A: Initial Version

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AD9272 TABLE OF CONTENTS
Features .. 1 Ultrasound .. 21 Applications ... 1 Channel Overview ... 22 General Description ... 1 Input Overdrive .. 25 Functional Block Diagram .. 1 CW Doppler Operation ... 25 Revision History ... 2 TGC Operation ... 27 Product Highlights ... 3 ADC ... 31 Specifications ... 4 Clock Input Considerations .. 31 AC Specifications .. 4 Serial Port Interface (SPI) .. 38 Digital Specifications ... 8 Hardware Interface ... 38 Switching Specifications .. 9 Memory Map .. 40 Absolute Maximum Ratings .. 11 Reading the Memory Map Table .. 40 Thermal Impedance ... 11 Reserved Locations .. 40 ESD Caution .. 11 Default Values ... 40 Pin Configuration and Function Descriptions ... 12 Logic Levels ... 40 Typical Performance Characteristics ... 15 Outline Dimensions ... 44 Equivalent Circuits ... 19 Ordering Guide .. 44 Theory of Operation .. 21
REVISION HISTORY 7/09—Rev. B to Rev. C
Changes to Input Overload Protection Section and Figure 43 ... 25 Changes to Digital Outputs and Timing Section and Changes to Figure 63 .. 33 Changes to Hardware Interface Section .. 39
6/09—Rev. A to Rev. B
Changes to Product Highlights Section ... 3 Changes to Table 1 .. 4 Changes to Absolute Maximum Ratings Table ... 11 Changes to Figure 22 .. 17 Changes to Figure 33 and Figure 34 ... 20 Changes to Low Noise Amplifier (LNA) Section ... 22 Changes to Active Impedance Matching Section ... 23 Changes to Figure 39 .. 23 Changes to LNA Noise Section ... 24 Changes to Figure 47 .. 28 Changes to Figure 48 and Figure 49 ... 29 Changes to CSB Pin Section .. 36 Changes to Reading the Memory Map Table Section.. 40
4/09—Revision A: Initial Version
Rev. C | Page 2 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ADC Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ULTRASOUND CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Active Impedance Matching LNA Noise INPUT OVERDRIVE Input Overload Protection CW DOPPLER OPERATION Crosspoint Switch TGC OPERATION Variable Gain Amplifier Gain Control VGA Noise Antialiasing Filter ADC CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO Pin SCLK Pin CSB Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE Caution RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS OUTLINE DIMENSIONS ORDERING GUIDE