Datasheet LTC2320-12 (Analog Devices)

LTC2320-12 Octal, 12-Bit + Sign, 1.5Msps/Ch Simultaneous Sampling ADC
FEATURES DESCRIPTION
n
1.5Msps/Ch Throughput Rate
The LTC®2320-12 is a low noise, high speed octal 12-bit n
Eight Simultaneously Sampling Channels
+ sign successive approximation register (SAR) ADC with n
Guaranteed 12-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2320-12
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
77dB SNR (Typ) at fIN = 500kHz
applications which require a wide dynamic range with n
–90dB THD (Typ) at fIN = 500kHz
high common mode rejection. The LTC2320-12 achieves n Guaranteed Operation to 125°C ±0.25LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 77dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V The LTC2320-12 has an onboard low drift (20ppm/°C max) Internal Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2320-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 20mW/Ch (Typ) 1.5Msps per channel throughput with no latency makes n Small 52-Lead (7mm × 8mm) QFN Package the LTC2320-12 ideally suited for a wide variety of high speed applications. The LTC2320-12 dissipates only 20mW
APPLICATIONS
per channel and offers nap and sleep modes to reduce the n High Speed Data Acquisition Systems power consumption to 26μW for further power savings n Communications during inactive periods. n Remote Data Acquisition All registered trademarks and trademarks are the property of their respective owners. n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION
10µF 1µF 3.3V OR 5V 1.8V TO 2.5V
32k Point FFT fSMPL = 1.5Msps, TRUE DIFFERENTIAL INPUTS
+ VDD GND GND OVDD
f NO CONFIGURATION REQUIRED
A
IN = 500kHz
IN1– S/H AIN1 12-BIT CMOS/LVDS 0
IN+, IN–
MUX + SIGN SDR/DDR + SNR = 78.4dB AIN2 SAR ADC REFBUFEN – S/H THD = –90.9dB A ARBITRARY DIFFERENTIAL IN2 –20 SINAD = 78.2dB VDD VDD A + IN3 SFDR = 95.2dB – S/H A SDO1 IN3 12-BIT SDO2 –40 MUX + SIGN A + SAR ADC SDO3 IN4 0V 0V – S/H A SDO4 IN4 SDO5 –60 LTC2320-12 SDO6 A + IN5– S/H SDO7 AIN5 12-BIT SDO8 –80 BIPOLAR UNIPOLAR MUX + SIGN V CLKOUT DD VDD A + SAR ADC IN6– S/H SCK AMPLITUDE (dBFS) AIN6 –100 CNV SAMPLE CLOCK A + IN7 0V 0V – S/H AIN7 12-BIT –120 MUX + SIGN A + SAR ADC IN8– S/H AIN8 –140 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 232012 TA01a FREQUENCY (MHz) EIGHT SIMULTANEOUS 1µF 10µF 10µF 10µF 10µF 232012 TA01b SAMPLING CHANNELS Rev B Document Feedback For more information www.analog.com 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics ADC Timing Characteristics ADC Timing Characteristics Typical Performance Characteristics Pin Functions CMOS data output option (CMOS/LVDS = low) LVDS data output option (CMOS/LVDS = high or FLOAT) Functional Block Diagram Timing Diagram Applications Information OVERVIEW CONVERTER OPERATION TRANSFER FUNCTION INPUT DRIVE CIRCUITS ADC REFERENCE DYNAMIC PERFORMANCE POWER CONSIDERATIONS TIMING AND CONTROL DIGITAL INTERFACE BOARD LAYOUT Package Description Revision History Typical Application Related Parts