Datasheet AD4111 (Analog Devices)

Low Power, 24-Bit, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs, Open Wire Detection Data Sheet AD4111 FEATURES GENERAL DESCRIPTION 24-bit ADC with integrated analog front end
The AD4111 is a low power, low noise, 24-bit, sigma-delta (Σ-Δ)
Up to 6.2 kSPS per channel (161 μs per channel)
analog-to-digital converter (ADC) that integrates an analog front
16 noise free bits at 1 kSPS per channel
end (AFE) for fully differential or single-ended, high impedance
85 dB rejection of 50 Hz and 60 Hz at 20 SPS per channel
(≥1 MΩ) bipolar, ±10 V voltage inputs, and 0 mA to 20 mA
±10 V inputs, 4 differential or 8 single-ended
current inputs.
Overrange up to ±20 V
The AD4111 also integrates key analog and digital signal
≥1 MΩ impedance
conditioning blocks to configure eight individual setups for
±0.06% accuracy at 25°C
each analog input channel in use. The AD4111 features a
Open wire detection
maximum channel scan rate of 6.2 kSPS (161 μs) for fully
0 mA to 20 mA inputs, 4 single-ended
settled data.
Overrange from −0.5 mA to +24 mA 60 Ω impedance
The embedded 2.5 V, low drift (5 ppm/°C), band gap internal
±0.08% accuracy at 25°C
reference (with output reference buffer) reduces the external
On-chip 2.5 V reference
component count.
±0.12% accuracy at 25°C, ±5 ppm/°C (typical) drift
The digital filter allows flexible settings, including simultaneous
Internal or external clock
50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The
Power supplies
user can select between the different filter settings depending on
AVDD = 3.0 V to 5.5 V
the demands of each channel in the application. The automatic
IOVDD = 2 V to 5.5 V
channel sequencer enables the ADC to switch through each
Total IDD = 3.9 mA
enabled channel.
Temperature range: −40°C to +105°C
The precision performance of the AD4111 is achieved by
3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)
integrating the proprietary iPassives™ technology from Analog
SPI, QSPI, MICROWIRE, and DSP compatible
Devices, Inc. The AD4111 is factory calibrated to achieve a high
APPLICATIONS
degree of specified accuracy.
Process control
The AD4111 also has the unique feature of open wire detection on
PLC and DCS modules
the voltage inputs (patent pending) for system level diagnostics using a single 5 V or 3.3 V power supply. The AD4111 operates with a single power supply, making it easy to use in galvanically isolated applications. The specified operating temperature range is −40°C to +105°C. The AD4111 is housed in a 40-lead, 6 mm × 6 mm LFCSP package.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS NOISE PERFORMANCE AND RESOLUTION THEORY OF OPERATION POWER SUPPLIES Single-Supply Operation (AVSS = DGND) DIGITAL COMMUNICATION AD4111 RESET CONFIGURATION OVERVIEW Channel Configuration Channel Registers ADC Setups Setup Configuration Registers Filter Configuration Registers Gain Registers Offset Registers ADC Mode and Interface Mode Configuration ADC Mode Register Interface Mode Register CIRCUIT DESCRIPTION MULTIPLEXER CURRENT INPUTS VOLTAGE INPUTS Fully Differential Inputs Single-Ended Inputs Adjusting Voltage Input Gain Open Wire Detection Example 1—Open Wire Detection (Single-Ended Input) Example 2—Open Wire Detection (Differential Input) Open Wire Detection Compensation Pins DATA OUTPUT CODING AD4111 REFERENCE Internal Reference External Reference BUFFERED REFERENCE INPUT CLOCK SOURCE Internal Oscillator External Crystal External Clock DIGITAL FILTER SINC5 + SINC1 FILTER SINC3 FILTER SINGLE CYCLE SETTLING ENHANCED 50 Hz AND 60 Hz REJECTION FILTERS OPERATING MODES CONTINUOUS CONVERSION MODE CONTINUOUS READ MODE SINGLE CONVERSION MODE STANDBY AND POWER-DOWN MODES CALIBRATION DIGITAL INTERFACE CHECKSUM PROTECTION CRC CALCULATION Polynomial Example of a Polynomial CRC Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) XOR Calculation Example of an XOR Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) INTEGRATED FUNCTIONS GENERAL-PURPOSE OUPUTS DELAY 16-BIT/24-BIT CONVERSIONS DOUT_RESET SYNCHRONIZATION Normal Synchronization Alternate Synchronization ERROR FLAGS ADC_ERROR CRC_ERROR REG_ERROR ERRORB Input/Output DATA_STAT IOSTRENGTH INTERNAL TEMPERATURE SENSOR APPLICATIONS INFORMATION GROUNDING AND LAYOUT REGISTER SUMMARY REGISTER DETAILS COMMUNICATIONS REGISTER STATUS REGISTER ADC MODE REGISTER INTERFACE MODE REGISTER REGISTER CHECK DATA REGISTER GPIO CONFIGURATION REGISTER ID REGISTER CHANNEL REGISTER 0 CHANNEL REGISTER 1 TO CHANNEL REGISTER 15 SETUP CONFIGURATION REGISTER 0 SETUP CONFIGURATION REGISTER 1 TO SETUP CONFIGURATION REGISTER 7 FILTER CONFIGURATION REGISTER 0 FILTER CONFIGURATION REGISTER 1 TO FILTER CONFIGURATION REGISTER 7 OFFSET REGISTER 0 OFFSET REGISTER 1 TO OFFSET REGISTER 7 GAIN REGISTER 0 GAIN REGISTER 1 TO GAIN REGISTER 7 OUTLINE DIMENSIONS ORDERING GUIDE