Datasheet CMX655A, CMX655D (CML Microcircuits)

HerstellerCML Microcircuits
BeschreibungUltra Low Power Voice Codec
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CMX655D/CMX655A. CML Microcircuits. Ultra Low Power Voice Codec. Features. Applications. Analogue and digital microphone support

Datasheet CMX655A, CMX655D CML Microcircuits, Revision: 3

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CMX655D/CMX655A CML Microcircuits Ultra Low Power Voice Codec
COMMUNICATION SEMICONDUCTORS D/655/3 October 2018 Provisional
Features Applications Analogue and digital microphone support Security alarm panels High efficiency Class-D amplifier Glass break detection Ultra Low power consumption Intercom and access systems 16 bit audio data Mobile radio and accessories Supports conventional telephony and HD voice (300Hz - 3.4kHz Wired telephony and 50Hz -7kHz bandwidths) Voice controlled equipment Supports audio bandwidths up to 21kHz Supports 8/16/32/48 ksps sample rates Flexible serial audio interface SPI™/TWI control interface1 Small 24-lead VQFN Package
VREF e u ec PLL and g af Signal MCLK ol r Filtering internal osc a e processing n t A nI DS ADCs LRCLK/FS e u ec I2S/PCM audio BCLK g a ol fr interface DO a e n t DI A nI Control registers and logic Optional second microphone Digital sidetone CSN/A0 Line out SPI/TWI control MISOSDA interface SCLK/SCL MOSI/A1 RSTN Class D Digital gain IRQN Filtering driver control VSS Supplies VDD
Figure 1 CMX655A Simplified Block Diagram
PLL and Signal MCLK igital Filtering internal osc D terface PDM to decimated processing 16 bit PCM In LRCLK/FS I2S/PCM audio BCLK interface DO DI Control registers and logic Digital sidetone Optional second microphone CSN/A0 Line out SPI/TWI control MISOSDA interface SCLK/SCL MOSI/A1 RSTN Class D Digital gain IRQN Filtering driver control VSS Supplies VDD
Figure 2 CMX655D Simplified Block Diagram
1 SPI™ is a trademark of Motorola Inc.  2018 CML Microsystems Plc Document Outline Datasheet Front Page 1 Brief Description 2 Block Diagram 2.1 CMX655A 2.2 CMX655D 3 Pin List 3.1 CMX655A 3.2 CMX655D 4 External Components 4.1 CMX655A 4.1.1 Power Supply and Pin Decoupling 4.1.2 SPI 4.1.3 TWI 4.1.4 Speaker and Microphone 4.2 CMX655D 4.2.1 Power Supply and Pin Decoupling 4.2.2 SPI 4.2.3 TWI 4.2.4 Speaker and Microphone 5 General Description 5.1 Power Management 5.1.1 External Supplies 5.1.2 Regulated Supplies 5.2 Device Reset 5.2.1 Power-On-Reset 5.2.2 Reset Pin 5.3 Main Clock 5.3.1 Clock Frequency 5.3.2 Clock Generation 5.3.3 PLL 5.3.4 Low Power Oscillator 5.3.5 Clock Control Registers 5.3.5.1 CLKCTRL ($03) 5.3.5.2 RDIVHI ($04) 5.3.5.3 RDIVLO ($05) 5.3.5.4 NDIVHI ($06) 5.3.5.5 NDIVLO ($07) 5.3.5.6 PLLCTRL ($08) 5.4 Microphone Interface 5.4.1 Digital Microphone Interface 5.4.2 Analogue Microphone Interface 5.5 Class-D Amplifier 5.5.1 Audio Outputs 5.5.2 Overload Current Protection 5.5.3 Thermal Protection 5.5.4 Clipping Detection 5.6 Audio Signal Processing 5.6.1 Record Level Control 5.6.1.1 Record Level Control Register 5.6.2 Automatic Gain Control 5.6.2.1 AGC Registers 5.6.3 Noise Gate 5.6.3.1 Noise Gate Registers 5.6.4 Record Level Detection 5.6.4.1 Record Level Detection Registers 5.6.5 Playback Preamplifier Gain 5.6.5.1 Playback Preamplifier Gain Register 5.6.6 Playback Volume Control 5.6.6.1 Playback Volume Register 5.6.7 Automatic Level Control 5.6.7.1 ALC Registers 5.6.8 Digital Sidetone 5.6.8.1 Digital Sidetone Register 5.6.9 Voice Filters 5.6.9.1 Low Pass Filter 5.6.9.2 DC Blocking Filter 5.6.9.3 High Pass Filter 5.6.9.4 Voice Filters Registers 5.6.10 Channel Multiplexing 5.6.11 Click-and-Pop Reduction 5.6.11.1 Click-and-Pop Reduction Register 5.7 Control Interface 5.7.1 SPI Slave 5.7.2 TWI Slave 5.8 Serial Audio Interface 5.8.1 I2S Mode 5.8.2 Left-Justified Mode 5.8.3 PCM Mode 5.8.4 Audio Companding 5.8.5 Serial Audio Interface Registers 5.9 Interrupt Status and IRQN Pin 5.9.1 Interrupt Registers 5.10 System Control 5.10.1 System Control Registers 5.11 Register Address Map 6 Application Notes 6.1 Programming Examples 6.1.1 Start-up 6.1.2 DC-offset Calibration 6.1.3 Configuration 6.1.4 Enable Audio Channels 6.1.5 Shutdown 7 Performance Specification 7.1 Electrical Performance 7.1.1 Absolute Maximum Ratings 7.1.2 Operating Limits 7.1.3 Operating Characteristics 7.1.3.1 DC Parameters 7.1.3.2 AC Parameters 7.1.3.3 SPI 7.1.3.4 TWI 7.1.3.5 SAI 7.1.3.6 Digital Microphone Interface 7.2 Typical Performance Characteristics 7.2.1 THD+N vs. Level performance 7.2.2 THD+N vs. Frequency performance 7.2.3 Class D Amplifier Efficiency 7.2.4 Filter Performance Speaker Channel 7.2.5 Filter Performance Microphone Channel 7.3 Packaging 7.3.1 CMX655D/CMX655A End of Document