Datasheet LT3790 (Analog Devices) - 9

HerstellerAnalog Devices
Beschreibung60V Synchronous 4-Switch Buck-Boost Controller
Seiten / Seite28 / 9 — PIN FUNCTIONS. CTRL (Pin 1):. EN/UVLO (Pin 9):. SS (Pin 2):. IVINP (Pin …
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DokumentenspracheEnglisch

PIN FUNCTIONS. CTRL (Pin 1):. EN/UVLO (Pin 9):. SS (Pin 2):. IVINP (Pin 10):. IVINN (Pin 11):. PWM (Pin 3):. IN (Pin 12):

PIN FUNCTIONS CTRL (Pin 1): EN/UVLO (Pin 9): SS (Pin 2): IVINP (Pin 10): IVINN (Pin 11): PWM (Pin 3): IN (Pin 12):

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LT3790
PIN FUNCTIONS CTRL (Pin 1):
Output Current Sense Threshold Adjustment
EN/UVLO (Pin 9):
Enable Control Pin. Forcing an accurate Pin. Regulating threshold V(ISP-ISN) is 1/20th of VCTRL. 1.2V falling threshold with an externally programmable CTRL linear range is from 0V to 1.1V. For VCTRL > 1.3V, hysteresis is generated by the external resistor divider the current sense threshold is constant at the full-scale and a 3µA pull-down current. Above the 1.2V (typical) value of 60mV. For 1.1V < VCTRL < 1.3V, the dependence of threshold (but below 6V), EN/UVLO input bias current is the current sense threshold upon VCTRL transitions from sub-µA. Below the falling threshold, a 3µA pull-down cur- a linear function to a constant value, reaching 98% of full rent is enabled so the user can define the hysteresis with scale by VCTRL = 1.2V. Connect CTRL to VREF for the 60mV the external resistor selection. An undervoltage condition default threshold. Force less than 50mV (typical) to stop resets soft-start. Tie to 0.3V, or less, to disable the device switching. Do not leave this pin open. and reduce VIN quiescent current below 1µA.
SS (Pin 2):
Soft-start reduces the input power sources
IVINP (Pin 10):
Positive Input for the Input Current Limit surge current by gradually increasing the controller’s cur- and Monitor. Input bias current for this pin is typically 90µA. rent limit. A minimum value of 22nF is recommended on
IVINN (Pin 11):
Negative Input for the Input Current Limit this pin. A 100k resistor must be placed between SS and and Monitor. The input bias current for this pin is typically VREF for the LT3790. 20µA.
PWM (Pin 3):
A signal low turns off switches, idles switch-
V
ing and disconnects the V
IN (Pin 12):
Main Input Supply. Bypass this pin to PGND C pin from all external loads. The with a capacitor. PWMOUT pin follows the PWM pin. PWM has an internal 90k pull-down resistor. If not used, connect to INTVCC.
INTVCC (Pin 13):
Internal 5V Regulator Output. The driver and control circuits are powered from this voltage. Bypass
C/10 (Pin 4):
C/10 Charge Termination Pin. An open-drain this pin to PGND with a minimum 4.7µF ceramic capacitor. pull-down on C/10 asserts if V(ISP-ISN) is less than 5mV (typical). To function, the pin requires an external pull-up
TG1 (Pin 14):
Top Gate Drive. Drives the top N-channel resistor. MOSFET with a voltage equal to INTVCC superimposed on the switch node voltage SW1.
SHORT (Pin 5):
Output Shorted Pin. An open-drain pull- down on SHORT asserts if FB is less than 400mV (typical)
BST1 (Pin 15):
Bootstrapped Driver Supply. The BST1 pin and V(ISP-ISN) is larger than 5mV (typical). To function, swings from a diode voltage below INTVCC up to a diode the pin requires an external pull-up resistor. voltage below VIN + INTVCC.
VREF (Pin 6):
Voltage Reference Output Pin, Typically 2V.
SW1 (Pin 16):
Switch Node. SW1 pin swings from a diode This pin drives a resistor divider for the CTRL pin, either voltage drop below ground up to VIN. for output current adjustment or for temperature limit/
PGND (Pins 17, 20):
Power Ground. Connect these pins compensation of the output load. Can supply up to 200µA closely to the source of the bottom N-channel MOSFET. of current.
BG1 (Pin 18):
Bottom Gate Drive. Drives the gate of the
ISMON (Pin 7):
Monitor pin that produces a voltage that bottom N-channel MOSFET between ground and INTV is twenty times the voltage V CC. (ISP-ISN). ISMON will equal 1.2V when V
BG2 (Pin 19):
Bottom Gate Drive. Drives the gate of the (ISP-ISN) = 60mV. For parallel applications, tie master LT3790 ISMON pin to slave LT3790 CTRL pin. bottom N-channel MOSFET between ground and INTVCC.
IVINMON (Pin 8):
Monitor pin that produces a voltage
SW2 (Pin 21):
Switch Node. SW2 pin swings from a diode that is twenty times the voltage V voltage drop below ground up to V (IVINP-IVINN). IVINMON OUT. will equal 1V when V(IVINP-IVINN) = 50mV. 3790fa For more information www.linear.com/LT3790 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts