Datasheet ADP5003 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungLow Noise Micro PMU, 3 A Buck Regulator with 3 A LDO
Seiten / Seite29 / 5 — Data Sheet. ADP5003. LDO SPECIFICATIONS. Table 3. Parameter. Symbol. Min …
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Data Sheet. ADP5003. LDO SPECIFICATIONS. Table 3. Parameter. Symbol. Min Typ. Max Unit. Test Conditions/Comments

Data Sheet ADP5003 LDO SPECIFICATIONS Table 3 Parameter Symbol Min Typ Max Unit Test Conditions/Comments

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Data Sheet ADP5003 LDO SPECIFICATIONS
VPVIN1 = VPVINSYS = 4.2 V to 15 V, VPVIN2 = 0.65 V to 5 V, LDO headroom voltage (VHR) = 300 mV, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
OUTPUT CHARACTERISTICS Programmable Output Voltage Range1 VPVOUT2 0.6 3.3 V LDO Gain ALDO 1.65 Output Voltage Accuracy2 σPVOUT2 −1 +1 % Load 2 current (ILOAD2) = 150 mA Regulation Line (ΔVPVOUT2/VPVOUT2)/ΔVPVIN2 0.007 %/V (VPVOUT2 + VHR) ≤ VPVIN2 ≤ 6 V, ILOAD2 = 100 mA Load (ΔVPVOUT2/VPVOUT2)/ΔIPVOUT2 0.08 %/A 10 mA ≤ ILOAD2 ≤ 3 A Total Output Voltage Accuracy σLDO ±1.5 % (VPVOUT2 + VHR) ≤ VPVIN2 ≤ 6 V, 10 mA ≤ ILOAD2 ≤ 3 A OPERATING SUPPLY CURRENT IGND 1.8 2.5 mA ILOAD2 = 0 μA 2.3 mA ILOAD2 = 3 A MINIMUM VOLTAGE REQUIREMENTS ILOAD2 = 3 A PVINSYS to PVOUT23 VLDO-PVINSYS 1.5 V VREG_LDO to PVOUT24 VLDO-VREG_LDO 1.35 V Required to drive NFET Dropout5 VDROPOUT 100 mV CURRENT-LIMIT THRESHOLD6 ILIMIT2 3.1 4.5 A LDO SOFT START (SS) TIME tSSLDO 400 µs LDO ACTIVE PULL-DOWN RPDWNLDO 300 Ω Channel disabled OUTPUT NOISE NPVOUT2 3 µV rms 10 Hz to 100 kHz, IOUT = 1 A LDO POWER SUPPLY REJECTION RATIO PSRRLDO VPVIN2 = VPVOUT2 + 0.3 V, IOUT = 1 A VPVOUT2 = 1.3 V 87 dB 1 kHz 82 dB 10 kHz 61 dB 100 kHz 38 dB 1000 kHz VPVOUT2 = 3.3 V 89 dB 1 kHz 83 dB 10 kHz 61 dB 100 kHz 37 dB 1000 kHz 1 Limited by minimum PVINSYS to PVOUT2 and VREG_LDO to PVOUT2 voltage. 2 The LDO output voltage accuracy is relative to the nominal output voltage and accounts for reference voltage, gain, and offset error. 3 PVINSYS must be higher than PVOUT2 for VLDO-PVINSYS to keep the LDO regulating. 4 PVOUT2 must be lower than VREG_LDO for VLDO-VREG_LDO to keep the LDO regulating. 5 The dropout voltage is the input to output voltage differential when the input voltage is set to the nominal output voltage. 6 The current-limit threshold is the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V output voltage is the current that causes the output voltage to drop to 90% of 1.0 V or 0.9 V.
ADAPTIVE HEADROOM CONTROLLER SPECIFICATIONS
VPVIN1 = VPVINSYS = 4.2 V to 15 V, VPVIN2 = 0.65 V to 5 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 4. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
HEADROOM VOLTAGE (PVIN2 − PVOUT2) VHR 160 mV ILOAD2 = 1 mA 280 mV ILOAD2 = 1.5 A 400 mV ILOAD2 = 3 A Rev. 0 | Page 5 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS LDO SPECIFICATIONS ADAPTIVE HEADROOM CONTROLLER SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Adaptive Headroom Control Precision Enable/Shutdown Undervoltage Lockout (UVLO) Thermal Shutdown (TSD) Active Pull Down Soft Start (SS) Power-Good BUCK REGULATOR Control Scheme Oscillator Frequency Control External Oscillator Synchronization Buck Startup Current-Limit and Short-Circuit Protection LDO REGULATOR LDO Startup Current Limit Differential Remote Sensing POWER-GOOD OUTPUT VOLTAGE OF THE BUCK REGULATOR OUTPUT VOLTAGE OF THE LDO REGULATOR VOLTAGE CONVERSION LIMITATIONS COMPONENT SELECTION Output Capacitors Input Capacitor Inductor COMPENSATION COMPONENTS DESIGN JUNCTION TEMPERATURE BUCK REGULATOR DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR SELECTING THE INDUCTOR FOR THE BUCK REGULATOR SELECTING THE OUTPUT CAPACITOR FOR THE BUCK REGULATOR DESIGNING THE COMPENSATION NETWORK FOR THE BUCK REGULATOR SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR ADAPTIVE HEADROOM CONTROL DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INDUCTOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE OUTPUT CAPACITORS FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL RECOMMENDED BUCK EXTERNAL COMPONENTS FOR THE BUCK REGULATOR BUCK CONFIGURATIONS INDEPENDENT ADAPTIVE HEADROOM LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE