Datasheet LT1010 (Analog Devices) - 16

LT1010
SCHEMATIC DIAGRAM (Excluding protection circuits)
R6 15Ω V+ R7 R10 Q11 300Ω 200Ω Q18 R5 BIAS 1.5k Q17 Q19 R2 R3 R4 Q5 R11 1k 1k 1k C1 200Ω Q20 30pF Q6 Q7 R12 Q8 Q21 R14 3k 7Ω Q3 Q12 R8 OUTPUT 1k Q2 Q15 R13 Q4 Q13 200Ω Q22 Q1 R1 Q9 Q10 R9 Q14 Q16 INPUT 4k 4k V– 1010 SD
DEFINITION OF TERMS Output Offset Voltage:
The output voltage measured with
Saturation Resistance:
The ratio of the change in output the input grounded (split supply operation). saturation voltage to the change in current producing it,
Input Bias Current:
The current out of the input terminal. going from no load to full load.*
Large-Signal Voltage Gain:
The ratio of the output volt-
Slew Rate:
The average time rate of change of output age change to the input voltage change over the specified voltage over the specified output range with an input step input voltage range.* between the specified limits.
Output Resistance:
The ratio of the change in output volt-
Bias Terminal Voltage:
The voltage between the bias age to the change in load current producing it.* terminal and V+.
Output Saturation Voltage:
The voltage between the
Supply Current:
The current at either supply terminal with output and the supply rail at the limit of the output swing no output loading. toward that rail. *Pulse measurements (~1ms) as required to minimize thermal effects.
Saturation Offset Voltage:
The output saturation voltage with no load. 1010fe 16 Document Outline Fteatures Applications Description Typical Application Absolute Maximum Ratings Preconditioning Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Schematic Diagram Definition Of Terms Package Description Revision History Related Parts