Datasheet LTC3895 (Analog Devices) - 12

LTC3895
operaTion Main Control Loop
If the NDRV LDO is being used with an external N-channel The LTC3895 uses a constant frequency, current mode MOSFET, the gate of the MOSFET tied to the NDRV pin step-down architecture. During normal operation, the is driven such that DRVCC regulates above the VIN LDO external top MOSFET is turned on when the clock sets regulation point, causing all DRVCC current to flow through the R the external N-channel MOSFET, bypassing the internal VIN S latch, and is turned off when the main current comparator, ICMP, resets the R LDO pass device. If the NDRV LDO is not being used, all S latch. The peak inductor current at which ICMP trips and resets the latch is con- DRVCC current flows through the internal P-channel pass trolled by the voltage on the ITH pin, which is the output device between the VIN and DRVCC pins. of the error amplifier, EA. The error amplifier compares If EXTVCC is taken above its switchover voltage, the VIN the output voltage feedback signal at the VFB pin (which and NDRV LDOs are turned off and an EXTVCC LDO is is generated with an external resistor divider connected turned on. Once enabled, the EXTVCC LDO supplies power across the output voltage, VOUT, to ground) to the internal from EXTVCC to DRVCC. Using the EXTVCC pin allows the 0.800V reference voltage. When the load current increases, DRVCC power to be derived from a high efficiency external it causes a slight decrease in VFB relative to the reference, source such as the LTC3895 switching regulator output. which causes the EA to increase the ITH voltage until the The INTV average inductor current matches the new load current. CC supply powers most of the other internal circuits in the LTC3895. The INTVCC LDO regulates to a fixed value After the top MOSFET is turned off each cycle, the bottom of 5V and its power is derived from the DRVCC supply. MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current comparator IR, or
Top MOSFET Driver and Charge Pump (CPUMP_EN Pin)
the beginning of the next clock cycle. The top MOSFET driver is biased from the floating boot- strap capacitor, C
DRV
B, which normally recharges during each
CC/EXTVCC/INTVCC Power
cycle through an internal switch whenever SW goes low. Power for the top and bottom MOSFET drivers is derived If the input voltage decreases to a voltage close to its output, from the DRVCC pin. The DRVCC supply voltage can be the loop may enter dropout and attempt to turn on the top programmed from 5V to 10V by setting the DRVSET pin. MOSFET continuously. The LTC3895 includes an internal Two separate LDOs (low dropout linear regulators) can charge pump that allows the top MOSFET to be turned on provide power from VIN to DRVCC. The internal VIN LDO continuously at 100% duty cycle. This charge pump deliv- uses an internal P-channel pass device between the VIN and ers current to C DRV B and is enabled when the CPUMP_EN pin CC pins. To prevent high on-chip power dissipation in is tied to INTV high input voltage applications, the LTC3895 also includes CC. Tying CPUMP_EN to GND disables the charge pump and causes the dropout detector to force the an NDRV LDO that utilizes the NDRV pin to supply power top MOSFET off for about one twelfth of the clock period to DRVCC by driving the gate of an external N-channel every tenth cycle to allow C MOSFET acting as a linear regulator with its source con- B to recharge, resulting in an effective 99% max duty cycle. nected to DRVCC and drain connected to VIN. The NDRV LDO includes an internal charge pump that allows NDRV
Shutdown and Start-Up (RUN, SS Pins)
to be driven above VIN for low dropout performance. The LTC3895 can be shut down using the RUN pin. Con- When the EXTVCC pin is tied to a voltage below its swi- necting the RUN pin below 1.12V shuts down the main tchover voltage (4.7V or 7.7V depending on the DRVUV control loop. Connecting the RUN pin below 0.7V disables pin), the VIN and NDRV LDOs are enabled and one of the controller and most internal circuits, including the them supplies power from VIN to DRVCC. The VIN LDO DRV has a slightly lower regulation point than the NDRV LDO. CC and INTVCC LDOs. In this state, the LTC3895 draws only 10μA of quiescent current. 3895fa 12 For more information www.linear.com/LTC3895 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts