Datasheet LTC1051, LTC1053 (Analog Devices) - 7

HerstellerAnalog Devices
BeschreibungDual/Quad Precision Zero-Drift Operational Amplifiers with Internal Capacitors
Seiten / Seite16 / 7 — APPLICATIO S I FOR ATIO. (a). (b). (c). Figure 2. Clock Feedthrough. …
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APPLICATIO S I FOR ATIO. (a). (b). (c). Figure 2. Clock Feedthrough. Figure 3. Adding a Feedback Capacitor to

APPLICATIO S I FOR ATIO (a) (b) (c) Figure 2 Clock Feedthrough Figure 3 Adding a Feedback Capacitor to

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LTC1051/LTC1053
U U W U APPLICATIO S I FOR ATIO
R2 100k RS = 0, RS = 100k, AV =11V/V AV =11V/V 20mV/DIV R1 20mV/DIV 1k – 1/2 LTC1051 RS RS = 0, RS = 100k, + AV =101V/V AV =101V/V 20mV/DIV 20mV/DIV 100µs/DIV 100µs/DIV 1051/53 F02
(a) (b) (c) Figure 2. Clock Feedthrough
As the ambient temperature rises, the leakage current of the feedback resistor value should not exceed 7k for the input protection devices increases, while the charge industrial temperature range and 5k for military tempera- injection component of the bias current, for all practical ture range. If a higher feedback resistor value is required, purposes, stays constant. At elevated temperatures (above a feedback capacitor of 20pF should be placed across the 85°C) the leakage current dominates and the bias current feedback resistor. Note that the most common circuits of both inputs assumes the same sign. with feedback factors approaching unity are unity gain followers and instrumentation amplifier front ends. The charge injection at the op amp input pins will cause (See Figure 4.) small output spikes. This phenomenon is often referred to as “clock feedthrough” and can be easily observed when the closed-loop gain exceeds 10V/V (Figure 2). The mag- RS = 100k nitude of the clock feedthrough is temperature indepen- AV =101V/V dent but it increases when the closed-loop gain goes up, when the source resistance increases and when the gain 20mV/DIV setting resistors increase (Figure 2a, 2b). It is important to RS = 1MΩ AV =101V/V note that the output small spikes are centered at 0V level and do not add to the output offset error budget. For 100µs/DIV instance, with RS = 1MΩ, the typical output offset voltage of Figure 2c is: C V + 1000pF OS(OUT) ≈ 108 • IB + 101VOS(IN) R1 R2 1k 2 A 10pA bias current will yield an output of 1mV 100k ±100µV. – 1/2 1 The output clock feedthrough can be attenuated by lower- LTC1051 RS 3 + ing the value of the gain setting resistors, i.e. R2 = 10k, 1051/53 F03 R1 = 100Ω, instead of 100k and 1k (Figure 2). Clock feedthrough can also be attenuated by adding a
Figure 3. Adding a Feedback Capacitor to
capacitor across the feedback resistor to limit the circuit
Eliminate Clock Feedthrough
bandwidth below the internal sampling frequency R2 < 7k, IF R1 > >R2 (Figure 3). R1 2 – 1/2 1
Input Capacitance
LTC1051 3 + The input capacitance of the LTC1051/LTC1053 op amps 1051/53 F04 is approximately 12pF. When the LTC1051/LTC1053 op amps are used with feedback factors approaching unity,
Figure 4. Operating the LTC1051 with Feedback Factors Approaching Unity
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