Datasheet LTM4676A (Analog Devices) - 132

LTM4676A
package DescripTion PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY. Table 32. LTM4676A BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
A1 V – + OUT0 B1 VOUT0 C1 VOUT0 D1 VOUT0 E1 ISNS0b F1 ISNS0b A2 V – + OUT0 B2 VOUT0 C2 VOUT0 D2 VOUT0 E2 ISNS0a F2 ISNS0a A3 VOUT0 B3 VOUT0 C3 VOUT0 D3 VOUT0 E3 GND F3 GND A4 GND B4 GND C4 GND D4 GND E4 GPIO0 F4 GPIO1 A5 SNUB0 B5 GND C5 TSNS0b D5 TSNS0a E5 ALERT F5 RUN0 A6 GND B6 GND C6 GND D6 SDA E6 SCL F6 RUN1 A7 GND B7 GND C7 GND D7 GND E7 SYNC F7 SGND A8 GND B8 GND C8 GND D8 COMP0b E8 COMP0a F8 SGND A9 GND B9 GND C9 GND D9 V + – OSNS0 E9 VOSNS0 F9 INTVCC A10 GND B10 SW + – 0 C10 DNC D10 VORB0 E10 VORB0 F10 GND A11 VIN0 B11 VIN0 C11 VIN0 D11 VIN0 E11 DNC F11 SVIN A12 VIN0 B12 VIN0 C12 VIN0 D12 VIN0 E12 VIN0 F12 SVIN
PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
G1 I – + SNS1b H1 ISNS1b J1 VOUT1 K1 VOUT1 L1 VOUT1 M1 VOUT1 G2 I – + SNS1a H2 ISNS1a J2 VOUT1 K2 VOUT1 L2 VOUT1 M2 VOUT1 G3 GND H3 GND J3 VOUT1 K3 VOUT1 L3 VOUT1 M3 VOUT1 G4 ASEL H4 FSWPHCFG J4 GND K4 GND L4 GND M4 GND G5 VOUT0CFG H5 VTRIM0CFG J5 TSNS1a K5 TSNS1b L5 GND M5 SNUB1 G6 VOUT1CFG H6 VTRIM1CFG J6 VDD25 K6 WP L6 GND M6 GND G7 SGND H7 SHARE_CLK J7 VDD33 K7 GND L7 GND M7 GND G8 SGND H8 COMP1a J8 COMP1b K8 GND L8 GND M8 GND G9 INTVCC H9 VOSNS1 J9 VORB1 K9 GND L9 GND M9 GND G10 GND H10 GND J10 GND K10 DNC L10 SW1 M10 GND G11 GND H11 DNC J11 VIN1 K11 VIN1 L11 VIN1 M11 VIN1 G12 GND H12 VIN1 J12 VIN1 K12 VIN1 L12 VIN1 M12 VIN1 4676afa 132 For more information www.linear.com/LTM4676A Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4676A In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photograph Package Description Revision History Typical Application Design Resources Related Parts