Datasheet LTM4678 (Analog Devices) - 123
| Hersteller | Analog Devices |
| Beschreibung | Dual 25A or Single 50A µModule Regulator with Digital Power System Management |
| Seiten / Seite | 124 / 123 — PACKAGE DESCRIPTION. NOTES. 5.86mm). MAX. 16mm. DIMENSIONS. NOM. BGA … |
| Revision | A |
| Dateiformat / Größe | PDF / 6.6 Mb |
| Dokumentensprache | Englisch |
PACKAGE DESCRIPTION. NOTES. 5.86mm). MAX. 16mm. DIMENSIONS. NOM. BGA Package. MIN. 144-Lead (16mm. SYMBOL
Textversion des Dokuments
LTM4678
PACKAGE DESCRIPTION
7 3 SEE NOTES PIN 1 SEE NOTES A B C D E F G H J K L M 0118 REV C 1 Y BGA 144 AR AIL A ACKAGE 2 TED. Y V DET 3 ATION 4 e TIONAL, 5 6 TOM VIEW G Y BE EITHER A MOLD OR TING PLANE Y LOADING ORIENT 7 Y 8 TED WITHIN THE ZONE INDICA PACKAGE BOT 9 TION PER JESD MS-028 AND JEP95 TURE LTMXXXXXX µModule TUM -Z- IS SEA b PACKAGE IN TRA 10 YOUT CAREFULL Y DA PACKAGE ROW AND COLUMN LABELING MA AMONG µModule PRODUCTS. REVIEW EACH P LA 11 AILS OF PIN #1 IDENTIFIER ARE OP
!
DET BUT MUST BE LOCA THE PIN #1 IDENTIFIER MA MARKED FEA 12 LL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. A 3 BALL DESIGNA 4 5. PRIMAR 6 Y PIN 1 BEVEL b e PIN “A1” TRA F COMPONENT Z A2 TE THK A
NOTES
BALL HT BALL DIMENSION PAD DIMENSION SUBSTRA MOLD CAP HT INDUCTOR HT PACKAGE SIDE VIEW ×
5.86mm)
EPOXY/SOLDER
MAX
6.26 0.70 2.41 0.90 0.66 0.36 2.05 3.15 0.15 0.10 0.20 0.30 0.15 AIL B Z TE DET ×
16mm
H1 A1 SUBSTRA
DIMENSIONS NOM
5.86 0.60 2.32 0.75 0.63 Y 16.00 16.00 1.27 13.97 13.97 0.32 2.00 2.94 Z
BGA Package
X Z Z AL NUMBER OF BALLS: 144 b1 AIL B M M TOT H2 eee
MIN
5.46 0.50 2.23 0.60 0.60 0.28 1.95 2.73 ccc Z DET ddd MOLD CAP // bbb Z AIL A DET
144-Lead (16mm
(Reference LTC DWG # 05-08-1540 Rev C) A A1 A2 b b1 D E e F G H1 H2 H3 aaa bbb ccc ddd eee H3
SYMBOL
Øb (144 PLACES) 0.0000 6.9850 5.7150 4.4450 3.1750 1.9050 0.6350 0.6350 1.9050 3.1750 4.4450 5.7150 6.9850 aaa Z 6.9850 5.7150 (4.35) 4.4450 3.1750 1.9050 YOUT 0.6350 0.0000 (7.3) D 0.6350 TOP VIEW 1.9050 PACKAGE TOP VIEW 3.1750 SUGGESTED PCB LA 4.4450 4 5.7150 (4.35) 6.9850 PIN “A1” CORNER X (1.0) (1.0) (6.6) (6.6) E Y aaa Z 0.630 ±0.025 Ø 144x Rev 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications For more information www.a subject to change without notice. No license is granted by implication or other nalog.com wise under any patent or patent rights of Analog Devices. 123 Document Outline Functional Diagram Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins Table 1. VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 3. FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 4. ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) Table 5. LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Figure 5. LTM4678 Status Register Summary Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Table 6. Abbreviations of Supported Data Formats Figure 6. PMBus Timing Diagram Figures 7 to 24 PMBus Protocols PMBus Command Summary PMBus Commands Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Table 8. Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Tables 10 thru 11: Output Current Derating Table 12. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Table 13. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Dual Phase Single Output Voltage vs Component Selection, 25A to 50A/μs Load Step Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage Fault Responses Output Current Fault Responses IC Temperature Fault Responses External Temperature Fault Sharing Fault Sharing Propagation Fault Sharing Response Scratchpad Identification Fault Warning and Status MFR_INFO Data Contents: Telemetry NVM Memory Commands Store/Restore Fault Logging Block Memory Write/Read Package Description Table 22. LTM4678 BGA Pinout Typical Applications Design Resources Related Parts
PACKAGE DESCRIPTION
7 3 SEE NOTES PIN 1 SEE NOTES A B C D E F G H J K L M 0118 REV C 1 Y BGA 144 AR AIL A ACKAGE 2 TED. Y V DET 3 ATION 4 e TIONAL, 5 6 TOM VIEW G Y BE EITHER A MOLD OR TING PLANE Y LOADING ORIENT 7 Y 8 TED WITHIN THE ZONE INDICA PACKAGE BOT 9 TION PER JESD MS-028 AND JEP95 TURE LTMXXXXXX µModule TUM -Z- IS SEA b PACKAGE IN TRA 10 YOUT CAREFULL Y DA PACKAGE ROW AND COLUMN LABELING MA AMONG µModule PRODUCTS. REVIEW EACH P LA 11 AILS OF PIN #1 IDENTIFIER ARE OP
!
DET BUT MUST BE LOCA THE PIN #1 IDENTIFIER MA MARKED FEA 12 LL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. A 3 BALL DESIGNA 4 5. PRIMAR 6 Y PIN 1 BEVEL b e PIN “A1” TRA F COMPONENT Z A2 TE THK A
NOTES
BALL HT BALL DIMENSION PAD DIMENSION SUBSTRA MOLD CAP HT INDUCTOR HT PACKAGE SIDE VIEW ×
5.86mm)
EPOXY/SOLDER
MAX
6.26 0.70 2.41 0.90 0.66 0.36 2.05 3.15 0.15 0.10 0.20 0.30 0.15 AIL B Z TE DET ×
16mm
H1 A1 SUBSTRA
DIMENSIONS NOM
5.86 0.60 2.32 0.75 0.63 Y 16.00 16.00 1.27 13.97 13.97 0.32 2.00 2.94 Z
BGA Package
X Z Z AL NUMBER OF BALLS: 144 b1 AIL B M M TOT H2 eee
MIN
5.46 0.50 2.23 0.60 0.60 0.28 1.95 2.73 ccc Z DET ddd MOLD CAP // bbb Z AIL A DET
144-Lead (16mm
(Reference LTC DWG # 05-08-1540 Rev C) A A1 A2 b b1 D E e F G H1 H2 H3 aaa bbb ccc ddd eee H3
SYMBOL
Øb (144 PLACES) 0.0000 6.9850 5.7150 4.4450 3.1750 1.9050 0.6350 0.6350 1.9050 3.1750 4.4450 5.7150 6.9850 aaa Z 6.9850 5.7150 (4.35) 4.4450 3.1750 1.9050 YOUT 0.6350 0.0000 (7.3) D 0.6350 TOP VIEW 1.9050 PACKAGE TOP VIEW 3.1750 SUGGESTED PCB LA 4.4450 4 5.7150 (4.35) 6.9850 PIN “A1” CORNER X (1.0) (1.0) (6.6) (6.6) E Y aaa Z 0.630 ±0.025 Ø 144x Rev 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications For more information www.a subject to change without notice. No license is granted by implication or other nalog.com wise under any patent or patent rights of Analog Devices. 123 Document Outline Functional Diagram Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins Table 1. VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 3. FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 4. ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) Table 5. LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Figure 5. LTM4678 Status Register Summary Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Table 6. Abbreviations of Supported Data Formats Figure 6. PMBus Timing Diagram Figures 7 to 24 PMBus Protocols PMBus Command Summary PMBus Commands Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Table 8. Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Tables 10 thru 11: Output Current Derating Table 12. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Table 13. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Dual Phase Single Output Voltage vs Component Selection, 25A to 50A/μs Load Step Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage Fault Responses Output Current Fault Responses IC Temperature Fault Responses External Temperature Fault Sharing Fault Sharing Propagation Fault Sharing Response Scratchpad Identification Fault Warning and Status MFR_INFO Data Contents: Telemetry NVM Memory Commands Store/Restore Fault Logging Block Memory Write/Read Package Description Table 22. LTM4678 BGA Pinout Typical Applications Design Resources Related Parts