Datasheet ADR293 (Analog Devices) - 10

HerstellerAnalog Devices
BeschreibungLow Noise, Micropower 5.0 V Precision Voltage Reference
Seiten / Seite12 / 10 — ADR293. THEORY OF OPERATION. DEVICE POWER DISSIPATION CONSIDERATIONS. …
RevisionD
Dateiformat / GrößePDF / 261 Kb
DokumentenspracheEnglisch

ADR293. THEORY OF OPERATION. DEVICE POWER DISSIPATION CONSIDERATIONS. BASIC VOLTAGE REFERENCE CONNECTIONS. OUT. 10µF. 0.1µF

ADR293 THEORY OF OPERATION DEVICE POWER DISSIPATION CONSIDERATIONS BASIC VOLTAGE REFERENCE CONNECTIONS OUT 10µF 0.1µF

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ADR293 THEORY OF OPERATION
The ADR293 uses a new reference generation technique known
DEVICE POWER DISSIPATION CONSIDERATIONS
as XFET, which yields a reference with low noise, low supply The ADR293 is guaranteed to deliver load currents to 5 mA current, and very low thermal hysteresis. with an input voltage that ranges from 5.5 V to 15 V. When The core of the XFET reference consists of two junction field this device is used in applications with large input voltages, effect transistors, one of which has an extra channel implant to care should be exercised to avoid exceeding the published raise its pinch-off voltage. By running the two JFETs at the same specifications for maximum power dissipation or junction drain current, the difference in pinch-off voltage can be amplified temperature that could result in premature device failure. and used to form a highly stable voltage reference. The intrinsic The following formula should be used to calculate a device’s reference voltage is around 0.5 V with a negative temperature maximum junction temperature or dissipation: coefficient of about –120 ppm/K. This slope is essentially locked T − T J A to the dielectric constant of silicon and can be closely compen- P = D θ sated by adding a correction term generated in the same fashion JA as the proportional-to-temperature (PTAT) term used to where: compensate band gap references. The big advantage over a band TJ and TA are the junction temperature and ambient gap reference is that the intrinsic temperature coefficient is temperature, respectively. some 30 times lower (therefore, less correction is needed) and PD is the device power dissipation. this results in much lower noise, because most of the noise of a θJA is the device package thermal resistance. band gap reference comes from the temperature compensation
BASIC VOLTAGE REFERENCE CONNECTIONS
circuitry. References, in general, require a bypass capacitor connected The simplified schematic in Figure 21 shows the basic topology from the VOUT pin to the GND pin. The circuit in Figure 22 of the ADR293. The temperature correction term is provided by illustrates the basic configuration for the ADR293. Note that the a current source with value designed to be proportional to decoupling capacitors are not required for circuit stability. absolute temperature. The general equation is
1 8

NC NC
R1 + R2 + R3 ⎞ V = V Δ ⎜ ⎟ + (I )(R3) OUT P PTAT
ADR293

2 7
R1 ⎠
NC V NC OUT 3 6
where:
+ 10µF 0.1µF 0.1µF
ΔVP is the difference in pinch-off voltage between the two FETs.
4 5 NC
2 02 4- IPTAT is the positive temperature coefficient correction current. 16
NC = NO CONNECT
00 The process used for the XFET reference also features vertical Figure 22. Basic Voltage Reference Configuration NPN and PNP transistors, the latter of which are used as output
NOISE PERFORMANCE
devices to provide a very low dropout voltage. The noise generated by the ADR293 is typically less than
VIN
15 μV p-p over the 0.1 Hz to 10 Hz band. The noise measure-
I1 I1
ment is made with a band-pass filter made of a 2-pole high-pass filter with a corner frequency at 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 10 Hz.
1 VOUT ∆VP R1 TURN-ON TIME IPTAT R2
Upon application of power (cold start), the time required for the output voltage to reach its final value within a specified
R3
error band is defined as the turn-on settling time. Two
1 EXTRA CHANNEL IMPLANT GND
components normally associated with this are the time for the 21 0
R1 + R2 + R3
4-
V
active circuits to settle and the time for the thermal gradients on
OUT = × ∆VP + IPTAT × R3 R1
16 00 the chip to stabilize. Figure 15 shows the typical turn-on time Figure 21. Simplified Schematic for the ADR293. Rev. D | Page 10 of 12 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION DEVICE POWER DISSIPATION CONSIDERATIONS BASIC VOLTAGE REFERENCE CONNECTIONS NOISE PERFORMANCE TURN-ON TIME APPLICATIONS KELVIN CONNECTIONS VOLTAGE REGULATOR FOR PORTABLE EQUIPMENT OUTLINE DIMENSIONS ORDERING GUIDE