Datasheet ADM1041A (Analog Devices)

HerstellerAnalog Devices
BeschreibungSecondary-Side Controller with Current Share and Housekeeping
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Secondary-Side Controller with. Current Share and Housekeeping. ADM1041A. FEATURES. INTERFACE AND INTERNAL FEATURES

Datasheet ADM1041A Analog Devices

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Secondary-Side Controller with Current Share and Housekeeping ADM1041A FEATURES INTERFACE AND INTERNAL FEATURES Digital calibration via internal EEPROM SMBus interface (I2C-compatible) Supports SSI specification Voltage-error amplifier Comprehensive fault detection Differential current sense Reduced component count on secondary side Sense resistor or current transformer option Standalone or microcontroller control Overvoltage protection Undervoltage protection SECONDARY-SIDE FEATURES Overcurrent protection Overtemperature protection Generates error signal for primary-side PWM Start-up undervoltage blanking Output voltage adjustment and margining Programmable digital debounce and delays Current sharing 352-byte EEPROM available for field data Current-limit adjustment 160-byte EEPROM for calibration OrFET control Programmable soft-start slew rate Ground continuity monitoring Standalone or microcontroller operation Differential load voltage sense APPLICATIONS AC mains undervoltage detection (ac sense) Network servers Overvoltage protection Web servers Power supply control OrFET RS VOUT RLOAD GND VDD VDD PWM V BIAS DD CONTROLLER SHARE BUS ADM1041A V CBD F DD G CS–/VLS FD VOUT THERMISTOR C SHRO V S+ DD V SHRS DD V V V CMP S+ S+ ICT VS– VS– PULSE AC_OK OTP MON2 DC_OK PEN PSON CCMP ADD0 V MICRO- DD SCMP SCL CONTROLLER GND SDA OPTIONAL ISOLATION BARRIER
05405-001 Figure 1. Typical Application Circuit
Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES SECONDARY-SIDE FEATURES INTERFACE AND INTERNAL FEATURES APPLICATIONS GENERAL DESCRIPTION SAMPLE APPLICATION CIRCUIT DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY THEORY OF OPERATION POWER MANAGEMENT GAIN TRIMMING AND CONFIGURATION DIFFERENTIAL REMOTE SENSE AMPLIFIER SET LOAD VOLTAGE LOAD OVERVOLTAGE (OV) LOCAL VOLTAGE SENSE LOCAL OVERVOLTAGE PROTECTION (OVP) LOCAL UNDERVOLTAGE PROTECTION (UVP) FALSE UV CLAMP VOLTAGE ERROR AMPLIFIER MAIN VOLTAGE REFERENCE CURRENT-SENSE AMPLIFIER CURRENT SENSING CURRENT-TRANSFORMER INPUT CURRENT-SENSE CALIBRATION CURRENT-LIMIT ERROR AMPLIFIER OVERCURRENT PROTECTION CURRENT SHARE CURRENT-SHARE OFFSET ISHARE DRIVE AMPLIFIER DIFFERENTIAL SENSE AMPLIFIER ISHARE ERROR AMPLIFIER ISHARE CLAMP SHARE_OK DETECTOR PULSE/ACSENSE2 PULSE ACSENSE OrFET GATE DRIVE OSCILLATOR AND TIMING GENERATORS LOGIC I/O AND MONITOR PINS CBD/ALERT MON1 MON2 PEN PSON MON3 DC_OK (POWER-OK, POWER Good, Etc.) MON4 AC_OK MON5 SMBus SERIAL PORT MICROPROCESSOR SUPPORT Interfacing Configuring for a Microprocessor BROADCASTING SMBus SERIAL INTERFACE GENERAL SMBus TIMING SMBus PROTOCOLS FOR RAM AND EEPROM SMBus Erase EEPROM Page Operations SMBus Write Operations Send Byte Write Byte/Word Block Write SMBus READ OPERATIONS Receive Byte Block Read Notes on SMBus Read Operations SMBus ALERT RESPONSE ADDRESS (ARA) SUPPORT FOR SMBus 1.1 LAYOUT CONSIDERATIONS POWER-UP AUTO-CONFIGURATION EXTENDED SMBus ADDRESSING SDA/PSONLINK SCL/AC_OKLink BACKDOOR ACCESS REGISTER LISTING DETAILED REGISTER DESCRIPTIONS MANUFACTURING DATA MICROPROCESSOR SUPPORT TEST NAME TABLE OUTLINE DIMENSIONS ORDERING GUIDE