Datasheet AD9233 (Analog Devices) - 4

HerstellerAnalog Devices
Beschreibung12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter
Seiten / Seite45 / 4 — AD9233. REVISION HISTORY. 8/06—Rev. 0 to Rev. A. 4/06—Revision 0: Initial …
RevisionA
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DokumentenspracheEnglisch

AD9233. REVISION HISTORY. 8/06—Rev. 0 to Rev. A. 4/06—Revision 0: Initial Version

AD9233 REVISION HISTORY 8/06—Rev 0 to Rev A 4/06—Revision 0: Initial Version

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AD9233 REVISION HISTORY 8/06—Rev. 0 to Rev. A 4/06—Revision 0: Initial Version
Updated Format.. Universal Added 80 MSPS .. Universal

Deleted Figure 19, Figure 20, Figure 22, and Figure 23; Renumbered Sequentially ..11 Deleted Figure 24, Figure 25, and Figure 27 to Figure 29; Renumbered Sequentially ..12 Deleted Figure 31 and Figure 34; Renumbered Sequentially ..13 Deleted Figure 37, Figure 38, Figure 40, and Figure 41; Renumbered Sequentially ..14 Deleted Figure 46; Renumbered Sequentially ...15 Deleted Figure 52; Renumbered Sequentially ...16 Changes to Figure 40 ..16 Changes to Figure 46 ..18 Inserted Figure 54; Renumbered Sequentially ..20 Changes to Digital Outputs Section ...21 Changes to Timing Section..22 Added Data Clock Output (DCO) Section..22 Changes to Configuration Using the SPI Section and Configuration Without the SPI Section ...23 Changes to Table 15 ..25 Changes to Table 16 ..39 Changes to Ordering Guide...42 Rev. A | Page 3 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations Single-Ended Input Configuration VOLTAGE REFERENCE Internal Reference Connection External Reference Operation CLOCK INPUT CONSIDERATIONS Clock Input Options Clock Duty Cycle JITTER CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE Power-Down Mode Standby Mode DIGITAL OUTPUTS Out-of-Range (OR) Condition Digital Output Enable Function (OEB) TIMING Data Clock Output (DCO) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE Open Locations Default Values Logic Levels SPI-Accessible Features LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS Exposed Paddle Thermal Heat Slug Recommendations CML RBIAS REFERENCE DECOUPLING EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS POWER VIN VREF RBIAS CLOCK PDWN CSB SCLK/DFS SDIO/DCS ALTERNATIVE CLOCK CONFIGURATIONS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION SCHEMATICS EVALUATION BOARD LAYOUTS BILL OF MATERIALS (BOM) OUTLINE DIMENSIONS ORDERING GUIDE