Datasheet AD7944 (Analog Devices) - 10

Data Sheet AD7944 TYPICAL PERFORMANCE CHARACTERISTICS
AVDD = DVDD = VIO = 2.5 V, BVDD = 5.0 V, VREF = 5.0 V, external reference (PDREF is high, REFIN is low), unless otherwise noted.
1.0 1.0 POSITIVE INL = +0.12 LSB POSITIVE DNL = +0.11LSB NEGATIVE INL = –0.20 LSB 0.8 0.8 NEGATIVE DNL = –0.11LSB 0.6 0.6 0.4 0.4 ) 0.2 ) 0.2 SB SB 0 (L (L 0 L L IN –0.2 DN –0.2 –0.4 –0.4 –0.6 –0.6 –0.8 –0.8 –1.0 –1.0 0 4096 8192 12,288 16,384
105
0 4096 8192 12,288 16,384
108
CODE
04658-
CODE
04658- Figure 5. Integral Nonlinearity vs. Code

Figure 8. Differential Nonlinearity vs. Code
140,000 80,000 126,022 70,000 67,766 120,000 62,982 60,000 100,000 50,000 80,000 UNT UNT 40,000 CO 60,000 CO 30,000 40,000 20,000 20,000 10,000 4899 0 0 2 149 0 0 0 0 0 324 0 0 0 0 0
106
8188 8189 8190 8191 8192 8193 8194 8195 8196 8188 8189 8190 8191 8192 8193 8194 8195
109
CODE IN HEX
04658-
CODE IN HEX
04658- Figure 6. Histogram of DC Input at Code Center (External Reference)

Figure 9. Histogram of DC Input at Code Transition (External Reference)
140,000 80,000 124,396 67,825 120,000 70,000 63,238 60,000 100,000 50,000 80,000 UNT UNT 40,000 CO 60,000 CO 30,000 40,000 20,000 20,000 10,000 5236 0 0 2 1438 0 0 0 0 0 7 2 0 0 0 0 8188 8189 8190 8191 8192 8193 8194 8195 8196
110
8189 8190 8191 8192 8193 8194 8195 8196
107
CODE IN HEX CODE IN HEX
04658- 04658- Figure 7. Histogram of DC Input at Code Center (Internal Reference)

Figure 10. Histogram of DC Input at Code Transition (Internal Reference) Rev. C | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION APPLICATION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL APPLICATION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096 V (PDREF Low) External 1.2 V Reference and Internal Buffer (PDREF High) External Reference (PDREF High, REFIN Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Host (Turbo or Normal Mode) Split Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Host (Turbo or Normal Mode) CS\ MODE, 3-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 3-WIRE WITH BUSY INDICATOR CS\ MODE, 4-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING AD7944 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE