Datasheet AD7985 (Analog Devices)

HerstellerAnalog Devices
Beschreibung16-Bit, 2.5 MSPS PulSAR 11 mW ADC in QFN
Seiten / Seite29 / 1 — 16-Bit, 2.5 MSPS, PulSAR. 15.5 mW ADC in LFCSP. Data Sheet. AD7985. …
RevisionC
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DokumentenspracheEnglisch

16-Bit, 2.5 MSPS, PulSAR. 15.5 mW ADC in LFCSP. Data Sheet. AD7985. FEATURES. APPLICATION DIAGRAM

Datasheet AD7985 Analog Devices, Revision: C

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16-Bit, 2.5 MSPS, PulSAR 15.5 mW ADC in LFCSP Data Sheet AD7985 FEATURES APPLICATION DIAGRAM 16-bit resolution with no missing codes 1.8V TO Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low) 5V 2.5V 2.7V Low power dissipation 15.5 mW at 2.5 MSPS, with external reference BVDD AVDD, VIO 0V DVDD TURBO VIO 28 mW at 2.5 MSPS, with internal reference TO IN+ V SDI 3- OR 4-WIRE INL: ±0.7 LSB typical, ±1.5 LSB maximum REF AD7985 SCK INTERFACE: IN– SPI, CS, SNR SDO DAISY CHAIN 88.5 dB, with on-chip reference GND REF CNV (TURBO = LOW) 90 dB, with external reference 10µF 4.096 V internal reference: typical drift of ±10 ppm/°C Pseudo differential analog input voltage range
01
NOTES
0
0 V to VREF with VREF up to 5.0 V 1. GND REFERS TO REFGND, AGND, AND DGND.
7947- 0
Allows use of any input range
Figure 1.
No pipeline delay GENERAL DESCRIPTION Logic interface: 1.8 V/2.5 V/2.7 V Proprietary serial interface SPI-/QSPI™-/MICROWIRE™-/DSP-
The AD79851 is a 16-bit, 2.5 MSPS successive approximation
compatible1
analog-to-digital converter (SAR ADC). It contains a low power,
Ability to daisy-chain multiple ADCs with busy indicator
high speed, 16-bit sampling ADC, an internal conversion clock,
20-lead, 4 mm × 4 mm LFCSP
an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the
APPLICATIONS
AD7985 samples an analog input, IN+, between 0 V and REF
Battery-powered equipment
with respect to a ground sense, IN−. The AD7985 features a
Communications
very high sampling rate turbo mode (TURBO is high) and a
ATE
reduced power normal mode (TURBO is low) for low power
Data acquisition systems
applications where the power is scaled with the throughput.
Medical instruments
In normal mode (TURBO is low), the SPI-compatible serial inter- face also features the ability, using the SDI input, to daisy-chain several ADCs on a single 3-wire bus and provide an optional busy indicator. It is compatible with 1.8 V, 2.5 V, and 2.7 V supplies using the separate VIO supply. The AD7985 is available in a 20-lead LFCSP with operation specified from −40°C to +85°C. 1 Protected by U. S. Patent 6,703,961.
Table 1. MSOP, LFCSP, 14-/16-/18-Bit PulSAR® ADCs1 Type 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS ADC Driver
14-Bit AD7940 AD79422 AD79462 16-Bit AD7680 AD76852 AD76862 AD79802 ADA4941-1 AD7683 AD76872 AD76882 AD79832 ADA4841-1 AD7684 AD7694 AD76932 AD79853 AD8021 18-Bit AD76912 AD76902 AD79822 ADA4941-1 AD79842 ADA4841-1 AD79863 AD8021 1 See www.analog.com for the latest selection of PulSAR ADCs and ADC drivers. 2 Pin for pin compatible with all other devices marked with this endnote. 3 The AD7985 and AD7986 are pin for pin compatible.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS APPLICATION DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096 V (PDREF Low) External 1.2 V Reference and Internal Buffer (PDREF High) External Reference (PDREF High, REFIN Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Host (Turbo or Normal Mode) Split-Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Host (Turbo or Normal Mode) /CS MODE, 3-WIRE WITHOUT BUSY INDICATOR /CS MODE, 3-WIRE WITH BUSY INDICATOR /CS MODE, 4-WIRE WITHOUT BUSY INDICATOR /CS MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING THE AD7985 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE