Datasheet LTC3839 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungFast, Accurate, 2-Phase, Single-Output Step-Down DC/DC Controller with Differential Output Sensing
Seiten / Seite50 / 9 — PIN FUNCTIONS. PHASMD (Pin 1):. + (Pin 8):. OUTSENSE. MODE/PLLIN (Pin …
Dateiformat / GrößePDF / 944 Kb
DokumentenspracheEnglisch

PIN FUNCTIONS. PHASMD (Pin 1):. + (Pin 8):. OUTSENSE. MODE/PLLIN (Pin 2):. – (Pin 9):. CLKOUT (Pin 3):

PIN FUNCTIONS PHASMD (Pin 1): + (Pin 8): OUTSENSE MODE/PLLIN (Pin 2): – (Pin 9): CLKOUT (Pin 3):

Modelllinie für dieses Datenblatt

Textversion des Dokuments

LTC3839
PIN FUNCTIONS PHASMD (Pin 1):
Phase Selector Input. This pin pull-up current source is connected to TRACK/SS pin. A determines the relative phases of channels and the capacitor to ground at this pin sets the ramp time to the CLKOUT signal. With zero phase being defined as the final regulated output voltage. Alternatively, another voltage rising edge of TG1: Pulling this pin to SGND locks TG2 to supply connected to this pin allows the output to track the 180°, and CLKOUT to 60°. Connecting this pin to INTVCC other supply during start-up. locks TG2 to 240° and CLKOUT to 120°. Floating this pin
V + (Pin 8):
Differential Output Sense Amplifier locks TG2 to 180° and CLKOUT to 90°.
OUTSENSE
(+) Input. Connect this pin to a feedback resistor divider
MODE/PLLIN (Pin 2):
Operation Mode Selection or External between the positive and negative output capacitor ter- Clock Synchronization Input. When this pin is tied to IN- minals of VOUT. In nominal operation the LTC3839 will TVCC, forced continuous mode operation is selected. Tying attempt to regulate the differential output voltage VOUT to this pin to SGND allows discontinuous mode operation. 0.6V divided by the feedback resistor divider ratio. When an external clock is applied at this pin, both chan-
V – (Pin 9):
Differential Output Sense Amplifier nels operate in forced continuous mode and synchronize
OUTSENSE
(–) Input. Connect this pin to the negative terminal of the to the external clock. output load capacitor of VOUT.
CLKOUT (Pin 3):
Clock Output of Internal Clock Genera-
SENSE1+, SENSE2+ (Pin 10, Pin 31):
Differential Current tor. Its output level swings between INTVCC and SGND. If Sense Comparator (+) Inputs. The ITH pin voltage and clock input is present at the MODE/PLLIN pin, it will be controlled offsets between the SENSE+ and SENSE– pins synchronized to the input clock, with phase set by the set the current trip threshold. The comparator can be used PHASMD pin. If no clock is present at MODE/PLLIN, its for RSENSE sensing or inductor DCR sensing. For RSENSE frequency will be set by the RT pin. To synchronize other sensing, Kelvin (4-wire) connect the SENSE+ pin to the controllers, it can be connected to their MODE/PLLIN pins. (+) terminal of RSENSE. For DCR sensing, tie the SENSE+
SGND (Pins 4, 29):
Signal Ground. All small-signal analog pins to the connection between the DCR sense capacitor and compensation components should be connected to and sense resistor tied across the inductor. this ground. Connect both SGND pins to the exposed pad
SENSE1–, SENSE2– (Pin 11, Pin 30):
Differential Current and PGND pin using a single PCB trace. Sense Comparator (–) Input. The comparator can be used
RT (Pin 5):
Clock Generator Frequency Programming Pin. for RSENSE sensing or inductor DCR sensing. For RSENSE Connect an external resistor from RT to SGND to program sensing, Kelvin (4-wire) connect the SENSE– pin to the (–) the switching frequency between 200kHz and 2MHz. An terminal of RSENSE. For DCR sensing, tie the SENSE– pin external clock applied to MODE/PLLIN should be within to the DCR sense capacitor tied to the inductor VOUT node ±30% of this programmed frequency to ensure frequency connection. These pins also function as output voltage lock. When the RT pin is floating, the frequency is internally sense pins for the top MOSFET on-time adjustment. The set to be slightly under 200kHz. impedance looking into these pins is different from the SENSE+ pins because there is an additional 500k internal
ITH (Pins 6):
Current Control Threshold. This pin is the resistor from each of the SENSE– pins to SGND. output of the error amplifier and the switching regulator’s compensation point. The current comparator threshold
DTR (Pin 12):
Detect Load-Release Transient for Overshoot increases with this control voltage. The voltage ranges Reduction. When load current suddenly drops, if voltage on from 0V to 2.4V, with 0.8V corresponding to zero sense this DTR pin drops below half of INTVCC, the bottom gate voltage (zero inductor valley current). (BG) could turn off, allowing the inductor current to drop to zero faster, thus reducing the VOUT overshoot. (Refer
TRACK/SS (Pin 7):
External Tracking and Soft-Start Input. to Load-Release Transient Detection in the Applications The LTC3839 regulates the feedback voltage (V + OUTSENSE Information section for more details.) An internal 5μA – V – OUTSENSE ) to the smaller of 0.6V or the voltage on the current source pulls this pin toward INTVCC. To disable TRACK/SS pin. An internal 1µA temperature-independent the DTR feature, simply tie the DTR pin to INTVCC. 3839fa 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Typical Performance Characteristics Pin Functions Functional Diagram Operation Typical Applications Typical Application Related Parts