Datasheet LTC3035 (Analog Devices) - 9

HerstellerAnalog Devices
Beschreibung300mA VLDO Linear Regulator with Charge Pump Bias Generator
Seiten / Seite12 / 9 — OPERATIO. Calculating Junction Temperature. Layout Considerations. …
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OPERATIO. Calculating Junction Temperature. Layout Considerations. Short-Circuit/Thermal Protection. Figure 7. Suggested Layout

OPERATIO Calculating Junction Temperature Layout Considerations Short-Circuit/Thermal Protection Figure 7 Suggested Layout

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LTC3035
U OPERATIO Calculating Junction Temperature
overstress condition is removed. Long term overstress Example: Given an output voltage of 1.5V, an input voltage (TJ>125°C) should be avoided as it can degrade the of 1.8V to 3V, an output current range of 0mA to 100mA performance or shorten the life of the part. and a maximum ambient temperature of 50°C, what will
Layout Considerations
the maximum junction temperature be? Connection from the BIAS and OUT pins to their respective The power dissipated by the device will be approximately: ceramic bypass capacitor should be kept as short as IOUT(MAX)(VIN(MAX) – VOUT) possible. The ground side of the bypass capacitors should be connected directly to the ground plane for best results where: or through short traces back to the GND pin of the part. I Long traces will increase the effective series ESR and OUT(MAX) = 100mA inductance of the capacitor which can degrade VIN(MAX) = 3V performance. so: The CP and CM pins of the charge pump are switching P = 100mA(3V – 1.5V) = 0.15W nodes. The transition edge rates of these pins can be quite fast (~10ns). Thus care must be taken to make sure these Even under worst-case conditions LTC3035’s BIAS pin nodes do not couple capacitively to other nodes (espe- power dissipation is only about 1mW, thus can be cially the ADJ pin). Place the flying capacitor as close as ignored. The junction to ambient thermal resistance will be possible to the CP and CM pins for optimum charge pump on the order of 76°C/W. The junction temperature rise performance. above ambient will be approximately equal to: Because the ADJ pin is relatively high impedance 0.15W(76°C/W) = 11.4°C (depending on the resistor divider used), stray capaci- The maximum junction temperature will then be equal to tance at this pin should be minimized (<10pF) to prevent the maximum junction temperature rise above ambient phase shift in the error amplifier loop. Additional special plus the maximum ambient temperature or: attention should be given to any stray capacitances that can couple external signals onto the ADJ pin producing T = 50°C + 11.4°C = 61.4°C undesirable output ripple. For optimum performance connect the ADJ pin to R1 and R2 with a short PCB trace
Short-Circuit/Thermal Protection
and minimize all other stray capacitance to the ADJ pin. The LTC3035 has built-in output short-circuit current Figure 7 shows an example layout for the LTC3035. limiting as well as over temperature protection. During short-circuit conditions, internal circuitry automatically CBIAS limits the output current to approximately 760mA. At 1 CP BIAS 8 higher temperatures, or in cases where internal power CF 2 CM SHDN 7 dissipation causes excessive self heating on chip, the R1 3 GND ADJ 6 thermal shutdown circuitry will shut down the charge R2 4 IN OUT 5 pump and LDO when the junction temperature exceeds approximately 155°C. It will reenable the converter and C C IN OUT LDO once the junction temperature drops back to approxi- 3035 F07 VIA CONNECTION mately 140°C. The LTC3035 will cycle in and out of TO GND PLANE thermal shutdown without latch-up or damage until the
Figure 7. Suggested Layout
3035f 9