Datasheet LTC2444, LTC2445, LTC2448, LTC2449 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | 24-Bit High Speed 8-/16-Channel ∆∑ ADCs with Selectable Speed/Resolution |
| Seiten / Seite | 30 / 6 — pin FuncTions GND (Pins 1, 4, 5, 6, 31, 32, 33):. NC (Pins 24, 25, 26, … |
| Dateiformat / Größe | PDF / 350 Kb |
| Dokumentensprache | Englisch |
pin FuncTions GND (Pins 1, 4, 5, 6, 31, 32, 33):. NC (Pins 24, 25, 26, 27):. MUXOUTP (Pin 24):. BUSY (Pin 2):. ADCINP (Pin 25):
Modelllinie für dieses Datenblatt
- LTC2444CUHF#PBF LTC2444CUHF#PBF LTC2444CUHF#TRPBF LTC2444CUHF#TRPBF LTC2444IUHF#PBF LTC2444IUHF#PBF LTC2444IUHF#TRPBF LTC2444IUHF#TRPBF
- LTC2445CUHF#PBF LTC2445CUHF#PBF LTC2445CUHF#TRPBF LTC2445CUHF#TRPBF LTC2445IUHF#PBF LTC2445IUHF#PBF LTC2445IUHF#TRPBF LTC2445IUHF#TRPBF
Textversion des Dokuments
LTC2444/LTC2445/ LTC2448/LTC2449
pin FuncTions GND (Pins 1, 4, 5, 6, 31, 32, 33):
Ground. Multiple ground
NC (Pins 24, 25, 26, 27):
LTC2444/LTC2448 No Connect. pins internally connected for optimum ground current flow These pins can either be tied to ground or left floating. and VCC decoupling. Connect each one of these pins to a common ground plane through a low impedance con-
MUXOUTP (Pin 24):
LTC2445/LTC2449 Positive Mul- nection. All seven pins must be connected to ground for tiplexer Output. Used to drive the input to an external proper operation. buffer/amplifier.
BUSY (Pin 2):
Conversion in Progress Indicator. This pin
ADCINP (Pin 25):
LTC2445/LTC2449 Positive ADC Input. is HIGH while the conversion is in progress and goes LOW Tie to output of buffer/amplifier driven by MUXOUTP. indicating the conversion is complete and data is ready.
ADCINN (Pin 26):
LTC2445/LTC2449 Negative ADC Input. It remains LOW during the sleep and data output states. Tie to output of buffer/amplifier driven by MUXOUTN. At the conclusion of the data output state, it goes HIGH indicating a new conversion has begun.
MUXOUTN (Pin 27):
LTC2445/LTC2449 Negative Mul- tiplexer Output. Used to drive the input to an external
EXT (Pin 3):
Internal/External SCK Selection Pin. This buffer/amplifier. pin is used to select internal or external SCK for output- ting/inputting data. If EXT is tied low, the device is in the
VCC (Pin 28):
Positive Supply Voltage. Bypass to GND with external SCK mode and data is shifted out of the device a 10µF tantalum capacitor in parallel with a 0.1µF ceramic under the control of a user applied serial clock. If EXT is capacitor as close to the part as possible. tied high, the internal serial clock mode is selected. The
REF+ (Pin 29), REF– (Pin 30):
Differential Reference Input. device generates its own SCK signal and outputs this on The voltage on these pins can have any value between the SCK pin. A framing signal BUSY (Pin 2) goes low GND and VCC as long as the reference positive input, REF+, indicating data is being output. is maintained more positive than the negative reference
COM (Pin 7):
The common negative input (IN–) for all input, REF+, by at least 0.1V. single ended multiplexer configurations. The voltage on
SDI (Pin 34):
Serial Data Input. This pin is used to select CH0 to CH15 and COM pins can have any value between the speed, 1X or 2X mode, resolution, and input channel, GND – 0.3V to VCC + 0.3V. Within these limits, the two for the next conversion cycle. At initial power up, the selected inputs (IN+ and IN–) provide a bipolar input range default mode of operation is CH0 to CH1, OSR of 256, (VIN = IN+ – IN–) from –0.5 • VREF to 0.5 • VREF. Outside and 1X mode. The serial data input contains an enable this input range, the converter produces unique overrange bit which determines if a new channel/speed is selected. and underrange output codes. If this bit is low the following conversion remains at the
CH0 to CH15 (Pins 8 to 23):
LTC2448/LTC2449 Analog same speed and selected channel. The serial data input Inputs. May be programmed for single-ended or differ- is applied to the device under control of the serial clock ential mode. (SCK) during the data output cycle. The first conversion following a new channel/speed is valid.
CH0 to CH7 (Pins 9, 10, 13, 14, 17, 18, 21, 22):
LTC2444/ LTC2445 Analog Inputs. May be programmed for single-
FO (Pin 35):
Frequency Control Pin. Digital input that con- ended or differential mode. trols the internal conversion clock. When FO is connected to VCC or GND, the converter uses its internal oscillator.
NC (Pins 8, 11, 12, 15, 16, 19, 20, 23):
LTC2444/LTC2445 No Connect/Channel Isolation Shield. May be left floating or tied to any voltage 0 to VCC in order to provide isolation for pairs of differential input channels. 2444589fc 6 For more information www.linear.com/LTC2444 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Pin Functions Functional Block Diagram Test Circuit Applications Information Package Description Revision History Typical Application Related Parts
pin FuncTions GND (Pins 1, 4, 5, 6, 31, 32, 33):
Ground. Multiple ground
NC (Pins 24, 25, 26, 27):
LTC2444/LTC2448 No Connect. pins internally connected for optimum ground current flow These pins can either be tied to ground or left floating. and VCC decoupling. Connect each one of these pins to a common ground plane through a low impedance con-
MUXOUTP (Pin 24):
LTC2445/LTC2449 Positive Mul- nection. All seven pins must be connected to ground for tiplexer Output. Used to drive the input to an external proper operation. buffer/amplifier.
BUSY (Pin 2):
Conversion in Progress Indicator. This pin
ADCINP (Pin 25):
LTC2445/LTC2449 Positive ADC Input. is HIGH while the conversion is in progress and goes LOW Tie to output of buffer/amplifier driven by MUXOUTP. indicating the conversion is complete and data is ready.
ADCINN (Pin 26):
LTC2445/LTC2449 Negative ADC Input. It remains LOW during the sleep and data output states. Tie to output of buffer/amplifier driven by MUXOUTN. At the conclusion of the data output state, it goes HIGH indicating a new conversion has begun.
MUXOUTN (Pin 27):
LTC2445/LTC2449 Negative Mul- tiplexer Output. Used to drive the input to an external
EXT (Pin 3):
Internal/External SCK Selection Pin. This buffer/amplifier. pin is used to select internal or external SCK for output- ting/inputting data. If EXT is tied low, the device is in the
VCC (Pin 28):
Positive Supply Voltage. Bypass to GND with external SCK mode and data is shifted out of the device a 10µF tantalum capacitor in parallel with a 0.1µF ceramic under the control of a user applied serial clock. If EXT is capacitor as close to the part as possible. tied high, the internal serial clock mode is selected. The
REF+ (Pin 29), REF– (Pin 30):
Differential Reference Input. device generates its own SCK signal and outputs this on The voltage on these pins can have any value between the SCK pin. A framing signal BUSY (Pin 2) goes low GND and VCC as long as the reference positive input, REF+, indicating data is being output. is maintained more positive than the negative reference
COM (Pin 7):
The common negative input (IN–) for all input, REF+, by at least 0.1V. single ended multiplexer configurations. The voltage on
SDI (Pin 34):
Serial Data Input. This pin is used to select CH0 to CH15 and COM pins can have any value between the speed, 1X or 2X mode, resolution, and input channel, GND – 0.3V to VCC + 0.3V. Within these limits, the two for the next conversion cycle. At initial power up, the selected inputs (IN+ and IN–) provide a bipolar input range default mode of operation is CH0 to CH1, OSR of 256, (VIN = IN+ – IN–) from –0.5 • VREF to 0.5 • VREF. Outside and 1X mode. The serial data input contains an enable this input range, the converter produces unique overrange bit which determines if a new channel/speed is selected. and underrange output codes. If this bit is low the following conversion remains at the
CH0 to CH15 (Pins 8 to 23):
LTC2448/LTC2449 Analog same speed and selected channel. The serial data input Inputs. May be programmed for single-ended or differ- is applied to the device under control of the serial clock ential mode. (SCK) during the data output cycle. The first conversion following a new channel/speed is valid.
CH0 to CH7 (Pins 9, 10, 13, 14, 17, 18, 21, 22):
LTC2444/ LTC2445 Analog Inputs. May be programmed for single-
FO (Pin 35):
Frequency Control Pin. Digital input that con- ended or differential mode. trols the internal conversion clock. When FO is connected to VCC or GND, the converter uses its internal oscillator.
NC (Pins 8, 11, 12, 15, 16, 19, 20, 23):
LTC2444/LTC2445 No Connect/Channel Isolation Shield. May be left floating or tied to any voltage 0 to VCC in order to provide isolation for pairs of differential input channels. 2444589fc 6 For more information www.linear.com/LTC2444 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Pin Functions Functional Block Diagram Test Circuit Applications Information Package Description Revision History Typical Application Related Parts