Datasheet LTC2325-16 (Analog Devices)

LTC2325-16 Quad, 16-Bit, 5Msps/Ch Simultaneous Sampling ADC
FEATURES DESCRIPTION
n
5Msps/Ch Throughput Rate
The LTC®2325-16 is a low noise, high speed quad 16-bit n
Four Simultaneously Sampling Channels
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2325-16
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
82dB SNR (Typ) at fIN = 2.2MHz
applications which require a wide dynamic range with high n
–88dB THD (Typ) at fIN = 2.2MHz
common mode rejection. The LTC2325-16 achieves ±2LSB n Guaranteed Operation to 125°C INL typical, no missing codes at 16 bits and 82dB SNR. n Single 3.3V or 5V Supply The LTC2325-16 has an onboard low drift (20ppm/°C max) n Low Drift (20ppm/°C Max) 2.048V or 4.096V 2.048V or 4.096V temperature-compensated reference. Internal Reference The LTC2325-16 also has a high speed SPI-compatible n 1.8V to 2.5V I/O Voltages serial interface that supports CMOS or LVDS. The fast n CMOS or LVDS SPI-Compatible Serial I/O 5Msps per channel throughput with one cycle latency n Power Dissipation 40mW/Ch (Typ) makes the LTC2325-16 ideally suited for a wide variety n Small 52-Pin (7mm × 8mm) QFN Package of high speed applications. The LTC2325-16 dissipates only 40mW per channel and offers nap and sleep modes
APPLICATIONS
to reduce the power consumption to 90μW for further n power savings during inactive periods. High Speed Data Acquisition Systems n Communications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property n Optical Networking of their respective owners. n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT fSMPL = 5Msps, TRUE DIFFERENTIAL INPUTS
10µF 1µF
f NO CONFIGURATION REQUIRED IN = 2.2MHz
3.3V OR 5V 1.8V TO 2.5V
IN+, IN–
0 SNR = 82.1dB VDD GND GND O ARBITRARY DIFFERENTIAL VDD THD = –88.1dB V –20 DD VDD A + CMOS/LVDS SINAD = 81.5dB IN1 A – S/H 16-BIT SDR/DDR SFDR = 90.2dB IN1 SAR ADC REFBUFEN –40 A + 16-BIT SDO1 0V 0V IN2 A – S/H IN2 SAR ADC SDO2 –60 SDO3 LTC2325-16 SDO4 BIPOLAR UNIPOLAR CLKOUT –80 + VDD VDD AIN3 SCK A – S/H 16-BIT IN3 SAR ADC AMPLITUDE (dBFS) –100 CNV SAMPLE A + IN4 CLOCK A – S/H 16-BIT SAR ADC –120 0V 0V IN4 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 –140 FOUR SIMULTANEOUS 1µF 10µF 10µF 10µF 10µF 0 0.5 1 1.5 2 2.5 SAMPLING CHANNELS 232516 TA01a FREQUENCY (MHz) 232516 TA01b 232516fa For more information www.linear.com/LTC2325-16 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts