Datasheet LTC2153-12 (Analog Devices)

HerstellerAnalog Devices
Beschreibung12-Bit 310Msps ADC
Seiten / Seite24 / 1 — FeaTures. DescripTion. applicaTions. Typical applicaTion. LTC2153-12 32K …
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DokumentenspracheEnglisch

FeaTures. DescripTion. applicaTions. Typical applicaTion. LTC2153-12 32K Point 2-Tone FFT,. fIN = 71MHz and 69MHz, 310Msps

Datasheet LTC2153-12 Analog Devices

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LTC2153-12 12-Bit 310Msps ADC
FeaTures DescripTion
n 67.6dBFS SNR The LTC®2153-12 is a 310Msps 12-bit A/D converter n 88dB SFDR designed for digitizing high frequency, wide dynamic n Low Power: 378mW Total range signals. It is perfect for demanding communications n Single 1.8V Supply applications with AC performance that includes 67.6dB n DDR LVDS Outputs SNR and 88dB spurious free dynamic range (SFDR). The n 1.32VP-P Input Range 1.25GHz input bandwidth allows the ADC to undersample n 1.25GHz Full Power Bandwidth S/H high frequencies with good performance. The latency is n Optional Clock Duty Cycle Stabilizer only six clock cycles. n Low Power Sleep and Nap Modes DC specs include ±0.6LSB INL (typ), ±0.1LSB DNL (typ) n Serial SPI Port for Configuration and no missing codes over temperature. The transition n Pin-Compatible 12-Bit Versions noise is 0.6LSBRMS. n 40-Lead (6mm × 6mm) QFN Package The digital outputs are double data rate (DDR) LVDS.
applicaTions
The ENC+ and ENC– inputs can be driven differentially with n Communications a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional n Cellular Basestations clock duty cycle stabilizer allows high performance at full n Software Defined Radios speed for a wide range of clock duty cycles. n Medical Imaging L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear n High Definition Video Technology Corporation. All other trademarks are the property of their respective owners. n Testing and Measurement Instruments
Typical applicaTion LTC2153-12 32K Point 2-Tone FFT, fIN = 71MHz and 69MHz, 310Msps
VDD OV 0 DD D10_11 –20 12-BIT ANALOG CORRECTION • S/H OUTPUT PIPELINED DDR INPUT LOGIC DRIVERS • ADC –40 • LVDS D0_1 –60 CLOCK/DUTY OGND AMPLITUDE (dBFS) –80 CLOCK CYCLE CONTROL GND –100 215312 TA01a –120 0 20 40 60 80 100 120 140 FREQUENCY (MHz) 215312 TA01b 215312fa For more information www.linear.com/LTC2153-12 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Power Requirements Digital Inputs And Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Typical Applications Package Description Related Parts