Datasheet LTC1746 (Analog Devices)

HerstellerAnalog Devices
BeschreibungLow Power,14-Bit, 25Msps ADC
Seiten / Seite20 / 1 — FEATURES. DESCRIPTIO. Sample Rate: 25Msps. 77.5dB SNR and 91dB SFDR (3.2V …
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DokumentenspracheEnglisch

FEATURES. DESCRIPTIO. Sample Rate: 25Msps. 77.5dB SNR and 91dB SFDR (3.2V Range). 74dB SNR and 96dB SFDR (2V Range). APPLICATIO S

Datasheet LTC1746 Analog Devices

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LTC1746 Low Power,14-Bit, 25Msps ADC
U FEATURES DESCRIPTIO

Sample Rate: 25Msps
The LTC®1746 is a 25Msps, sampling 14-bit A/D con- ■
77.5dB SNR and 91dB SFDR (3.2V Range)
verter designed for digitizing high frequency, wide dy- ■
74dB SNR and 96dB SFDR (2V Range)
namic range signals. Pin selectable input ranges of ±1V ■ No Missing Codes and ±1.6V along with a resistor programmable mode ■ Single 5V Supply allow the LTC1746’s input range to be optimized for a wide ■ Low Power Dissipation: 390mW variety of applications. ■ Selectable Input Ranges: ±1V or ±1.6V The LTC1746 is perfect for demanding communications ■ 240MHz Full Power Bandwidth S/H applications with AC performance that includes 77.5dB ■ Pin Compatible Family SNR and 91dB spurious free dynamic range. Ultralow jitter 25 Msps: LTC1746 (14-Bit), LTC1745 (12-Bit) of 0.3ps 50 Msps: LTC1744 (14-Bit), LTC1743 (12-Bit) RMS allows undersampling with excellent noise performance. DC specs include ±3LSB INL maximum and 65 Msps: LTC1742 (14-Bit), LTC1741 (12-Bit) no missing codes over temperature. 80 Msps: LTC1748 (14-Bit), LTC1747 (12-Bit) The digital interface is compatible with 5V, 3V and 2V logic
U
systems. The ENC and ENC inputs may be driven differen-
APPLICATIO S
tially from PECL, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ■ Telecommunications ENC and ENC inputs may also be driven by a sinusoidal ■ Medical Imaging signal without degrading performance. A separate digital ■ Receivers output power supply can be operated from 0.5V to 5V, ■ Base Stations making it easy to connect directly to low voltage DSPs ■ Spectrum Analysis or FIFOs. ■ Imaging Systems , LTC and LT are registered trademarks of Linear Technology Corporation. The TSSOP package with a flow-through pinout simplifies the board layout.
W BLOCK DIAGRA 25Msps, 14-Bit ADC with a
±
1V Differential Input Range
OVDD 0.5V TO 5V A + IN 0.1µF 0.1µF OF ±1V 14 D13 DIFFERENTIAL S/H 14-BIT OUTPUT • • ANALOG INPUT AMP PIPELINED ADC LATCHES • A – D0 IN CLKOUT SENSE OGND BUFFER VDD RANGE 5V SELECT 1µF 1µF 1µF DIFF AMP VCM GND 2.35VREF CONTROL LOGIC 4.7µF 1746 BD REFLB REFHA REFLA REFHB ENC ENC MSBINV OE 4.7µF 0.1µF 0.1µF DIFFERENTIAL ENCODE INPUT 1µF 1µF 1746f 1