Datasheet AD8641, AD8642, AD8643 (Analog Devices) - 14
| Hersteller | Analog Devices |
| Beschreibung | Low Power, Rail-to-Rail Output, Precision JFET Amplifiers |
| Seiten / Seite | 15 / 14 — AD8641/AD8642/AD8643. Data Sheet. 8.75 (0.3445) 8.55 (0.3366). 4.00 … |
| Revision | F |
| Dateiformat / Größe | PDF / 323 Kb |
| Dokumentensprache | Englisch |
AD8641/AD8642/AD8643. Data Sheet. 8.75 (0.3445) 8.55 (0.3366). 4.00 (0.1575). 6.20 (0.2441). 3.80 (0.1496). 5.80 (0.2283)
Modelllinie für dieses Datenblatt
Textversion des Dokuments
AD8641/AD8642/AD8643 Data Sheet 8.75 (0.3445) 8.55 (0.3366) 14 8 4.00 (0.1575) 6.20 (0.2441) 1 3.80 (0.1496) 7 5.80 (0.2283) 1.27 (0.0500) 0.50 (0.0197) BSC 45° 1.75 (0.0689) 0.25 (0.0098) 0.25 (0.0098) 1.35 (0.0531) 8° 0.10 (0.0039) 0° COPLANARITY SEATING 0.10 0.51 (0.0201) 1.27 (0.0500) PLANE 0.25 (0.0098) 0.31 (0.0122) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS A (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N] (R-14) Dimensions shown in millimeters and (inches)
3.10 0.30 3.00 SQ 0.25 2.90 PIN 1 0.20 PIN 1 INDICATOR 13 16 INDICATOR 0.50 12 1 BSC EXPOSED 1.65 PAD 1.50 SQ 1.45 9 4 8 5 0.50 0.20 MIN TOP VIEW BOTTOM VIEW 0.40 0.30 0.80 FOR PROPER CONNECTION OF 0.75 0.05 MAX THE EXPOSED PAD, REFER TO 0.70 THE PIN CONFIGURATION AND 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF A 2012- 26- COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 01-
Figure 48. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-16-27) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding
AD8641AKSZ-R2 −40°C to +125°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 A07 AD8641AKSZ-REEL7 −40°C to +125°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 A07 AD8641ARZ −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8641ARZ-REEL7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A0A AD8642ARMZ-REEL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A0A AD8642ARZ −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARZ-REEL7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARZ-REEL −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8643ARZ −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14 AD8643ARZ-REEL7 −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14 AD8643ACPZ-R2 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-27 AUA AD8643ACPZ-REEL7 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-27 AUA 1 Z = RoHS Compliant Part. Rev. F | Page 14 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N] (R-14) Dimensions shown in millimeters and (inches)
3.10 0.30 3.00 SQ 0.25 2.90 PIN 1 0.20 PIN 1 INDICATOR 13 16 INDICATOR 0.50 12 1 BSC EXPOSED 1.65 PAD 1.50 SQ 1.45 9 4 8 5 0.50 0.20 MIN TOP VIEW BOTTOM VIEW 0.40 0.30 0.80 FOR PROPER CONNECTION OF 0.75 0.05 MAX THE EXPOSED PAD, REFER TO 0.70 THE PIN CONFIGURATION AND 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF A 2012- 26- COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 01-
Figure 48. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-16-27) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding
AD8641AKSZ-R2 −40°C to +125°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 A07 AD8641AKSZ-REEL7 −40°C to +125°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 A07 AD8641ARZ −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8641ARZ-REEL7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A0A AD8642ARMZ-REEL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A0A AD8642ARZ −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARZ-REEL7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8642ARZ-REEL −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 AD8643ARZ −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14 AD8643ARZ-REEL7 −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14 AD8643ACPZ-R2 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-27 AUA AD8643ACPZ-REEL7 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-27 AUA 1 Z = RoHS Compliant Part. Rev. F | Page 14 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE