Datasheet ADA4807-1, ADA4807-2, ADA4807-4 (Analog Devices) - 2

HerstellerAnalog Devices
Beschreibung3.1 nV/√Hz, 1 mA, 180 MHz, Rail-to-Rail Input/Output Amplifier
Seiten / Seite33 / 2 — ADA4807-1/ADA4807-2/ADA4807-4. Data Sheet. TABLE OF CONTENTS. REVISION …
RevisionB
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DokumentenspracheEnglisch

ADA4807-1/ADA4807-2/ADA4807-4. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 9/15—Rev. A to Rev. B. 4/15—Rev. 0 to Rev. A

ADA4807-1/ADA4807-2/ADA4807-4 Data Sheet TABLE OF CONTENTS REVISION HISTORY 9/15—Rev A to Rev B 4/15—Rev 0 to Rev A

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ADA4807-1/ADA4807-2/ADA4807-4 Data Sheet TABLE OF CONTENTS
Features .. 1  Slew, Transient, Settling Time, and Crosstalk ... 18  Applications ... 1  Distortion and Noise .. 20  Pin Connection Diagrams ... 1  Output Characteristics... 22  General Description ... 1  Overdrive Recovery and Turn On/Turn Off Times .. 23  Revision History ... 2  Theory of Operation .. 24  Specifications ... 3  Disable Circuitry .. 25  ±5 V Supply ... 3  Input Protection ... 25  5 V Supply .. 5  Noise Considerations ... 25  3 V Supply .. 7  Applications Information .. 26  Absolute Maximum Ratings .. 9  Capacitive Load Drive ... 26  Maximum Power Dissipation ... 9  Low Noise FET Operational Amplifier ... 26  Thermal Resistance .. 9  Power Mode ADC Driver ... 27  ESD Caution .. 9  ADC Driving ... 28  Pin Configurations and Function Descriptions ... 10  ADC Driving with Dynamic Power Scaling ... 29  Typical Performance Characteristics ... 13  Layout, Grounding, and Bypassing .. 30  Frequency Response ... 13  Outline Dimensions ... 31  Frequency and Supply Current ... 15  Ordering Guide .. 33  DC and Input Common-Mode Performance ... 16 
REVISION HISTORY 9/15—Rev. A to Rev. B
Added Figure 58 ... 33 Added ADA4807-4 ... Universal Changes to Ordering Guide .. 33 Changes to Features Section, General Description Section, and

Table 1 .. 1
4/15—Rev. 0 to Rev. A
Added Figure 4, Renumbered Sequentially .. 1 Added ADA4807-2 ... Universal Changes to Table 2 .. 3 Changes to Features Section, General Description Changes to Table 3 .. 5 Section, and Pin Connection Diagrams Heading ... 1 Changes to Table 4 .. 7 Added Figure 2 and Figure 3; Renumbered Sequentially .. 1 Deleted Figure 6, Renumbered Sequentially ... 10 Changes to Table 1 ... 3 Changes to Figure 6 .. 10 Changes to Table 2 ... 5 Added Figure 9 and Table 9, Renumbered Sequentially ... 12 Changes to Table 3 ... 7 Changes to Figure 20 .. 14 Changes to Table 6 and Figure 4 .. 9 Added Figure 21 .. 14 Added Figure 7, Figure 8, and Table 8; Renumbered Sequentially .. 11 Added Figure 31 and Figure 32... 16 Reorganized Layout, Typical Performance Characteristics Added Figure 35 .. 17 Section .. 12 Changes to Figure 39 .. 18 Added Figure 36 ... 16 Added Figure 42 .. 19 Changes to Figure 37 Caption, Figure 38 Caption, Figure 39 Deleted Figure 50, Figure 51, Figure 53, and Figure 54 ... 19 Caption, and Figure 40 Caption ... 17 Added Figure 46 .. 20 Changes to Figure 44 and Figure 47... 18 Added Figure 49 and Figure 51... 21 Change to Theory of Operation Section ... 20 Added Figure 59 and Figure 61... 23 Changes to DISABLE Circuitry Section, Table 9, and Noise Changes to DISABLE Circuitry Section .. 25 Considerations Section .. 21 Added Low Noise FET Operational Amplifier Section ... 26 Added Figure 65 and Figure 66 .. 23 Added Figure 70, Figure 71, Figure 72, and Power Mode ADC Changes to Ordering Guide .. 25 Driver Section ... 27 Added ADC Driving Section and Figure 73 through Figure 77 ... 28
12/14—Revision 0: Initial Version
Added ADC Driving with Dynamic Power Scaling Section, Figure 78, Figure 79, and Figure 80 .. 29 Rev. B | Page 2 of 33 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAMS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ±5 V SUPPLY 5 V SUPPLY 3 V SUPPLY ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FREQUENCY RESPONSE FREQUENCY AND SUPPLY CURRENT DC AND INPUT COMMON-MODE PERFORMANCE SLEW, TRANSIENT, SETTLING TIME, AND CROSSTALK DISTORTION AND NOISE OUTPUT CHARACTERISTICS OVERDRIVE RECOVERY AND TURN ON/TURN OFF TIMES THEORY OF OPERATION DISABLE CIRCUITRY INPUT PROTECTION NOISE CONSIDERATIONS APPLICATIONS INFORMATION CAPACITIVE LOAD DRIVE LOW NOISE FET OPERATIONAL AMPLIFIER POWER MODE ADC DRIVER ADC DRIVING ADC DRIVING WITH DYNAMIC POWER SCALING LAYOUT, GROUNDING, AND BYPASSING OUTLINE DIMENSIONS ORDERING GUIDE