Datasheet Texas Instruments ADS808Y/250 — Datenblatt

HerstellerTexas Instruments
SerieADS808
ArtikelnummerADS808Y/250
Datasheet Texas Instruments ADS808Y/250

12-Bit-Analog-Digital-Wandler (ADC) mit 70 MSPS 48-HTQFP -40 bis 85

Datenblätter

ADS808: 12-Bit, 70MHz Sampling Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, Revision: C, Datei veröffentlicht: Sep 4, 2002
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin48
Package TypePHP
Industry STD TermHTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierSMALL T&R
Device MarkingADS808Y
Width (mm)7
Length (mm)7
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

# Input Channels1
Analog Input BW1000 MHz
ArchitecturePipeline
DNL(Max)1.7 +/-LSB
DNL(Typ)0.7 +/-LSB
ENOB10.3 Bits
INL(Max)7 +/-LSB
INL(Typ)4 +/-LSB
Input BufferNo
Input Range1,2 Vp-p
InterfaceParallel CMOS
Operating Temperature Range-40 to 85 C
Package GroupHTQFP
Package Size: mm2:W x L48HTQFP: 81 mm2: 9 x 9(HTQFP) PKG
Power Consumption(Typ)720 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SFDR68 dB
SINAD64 dB
SNR64 dB
Sample Rate(Max)70 MSPS

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Datei veröffentlicht: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.

Modellreihe

Serie: ADS808 (1)
  • ADS808Y/250

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)