Datasheet Texas Instruments SN74GTLPH16912GR — Datenblatt

HerstellerTexas Instruments
SerieSN74GTLPH16912
ArtikelnummerSN74GTLPH16912GR
Datasheet Texas Instruments SN74GTLPH16912GR

18-Bit-LVTTL-zu-GTLP-Universalbus-Transceiver 56-TSSOP -40 bis 85

Datenblätter

18-Bit LVTTL-to-GTLP Universal Bus Transceiver datasheet
PDF, 772 Kb, Revision: C, Datei veröffentlicht: Jul 26, 2001
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin56
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingGTLPH16912
Width (mm)6.1
Length (mm)14
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

Bits18
F @ Nom Voltage(Max)175 Mhz
ICC @ Nom Voltage(Max)50 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)50 mA
Package GroupTSSOP
Package Size: mm2:W x L56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyGTLP
VCC(Max)3.45 V
VCC(Min)3.15 V
Voltage(Nom)3.3 V
tpd @ Nom Voltage(Max)6.5 ns

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Texas Instruments GTLP Frequently Asked Questions
    PDF, 496 Kb, Datei veröffentlicht: Jan 1, 2001
    Using a question-and-answer format, advantages of TI?s GTLP devices, particularly for backplane applications, are presented, as well as differences between GTLP and GTL/LVDS devices. Applicable topics include data throughput rates, synchronous clocks, price and alternative sources, bus transceivers, live insertion, power consumption, backplane termination, voltage translation, IBIS and HSPICE mode
  • Logic in Live-Insertion Applications With a Focus on GTLP
    PDF, 493 Kb, Datei veröffentlicht: Jan 14, 2002
    Live-insertion capability is an essential part of today?s high-speed data systems because those systems are expected to run continuously without being powered down. This application report delves into the cause and prevention of live-insertion and nanosecond-discontinuity effects, using both simulation and actual test measurements from a specially built GTLP EVM. Hypothetical cases for precharge c
  • Achieving Maximum Speed on Parallel Buses With Gunning Transceiver Logic (GTLP)
    PDF, 585 Kb, Datei veröffentlicht: Apr 5, 2001
    This application report compares two approaches for synchronous bus-system designs. The focus of the report is the comparison of a system using central-synchronous system clock (CSSC) with a system operated with a source-synchronous system clock (SSSC).The basic characteristics of lines, key factors that influence the bus line delay, and the impedance of bus lines are described.The theoretical
  • Fast GTLP Backplanes With the GTLPH1655 (Rev. A)
    PDF, 1.1 Mb, Revision: A, Datei veröffentlicht: Sep 19, 2000
    This revision of the Fast GTL Backplanes With the GTL1655 application report addresses improvements, such as the improved OECE circuitry and implementation of theTexas Instruments TI-OPCE circuitry, that have been incorporated in the GTLPH1655 device. These improvements significantly improve signal integrity in distributed loads.This application report describes the physical principles of fast
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, Datei veröffentlicht: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Modellreihe

Serie: SN74GTLPH16912 (1)
  • SN74GTLPH16912GR

Herstellerklassifikation

  • Semiconductors > Logic > Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)