Datasheet Texas Instruments TPS51200DRCR — Datenblatt

Hersteller	Texas Instruments
Serie	TPS51200
Artikelnummer	TPS51200DRCR

3A Sink / Source DDR Termination Regulator mit VTTREF-Pufferreferenz für DDR2, DDR3, DDR3L und DDR4 10-VSON -40 bis 85

Datenblätter

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PDF, 1.3 Mb, Revision: C, Datei veröffentlicht: Nov 30, 2016

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Preise

Status

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

Verpackung

Pin	10
Package Type	DRC
Industry STD Term	VSON
JEDEC Code	S-PDSO-N
Package QTY	3000
Carrier	LARGE T&R
Device Marking	1200
Width (mm)	3
Length (mm)	3
Thickness (mm)	.9
Pitch (mm)	.5
Max Height (mm)	1
Mechanical Data	Herunterladen

Parameter

Control Mode	D-CAP,S3,S4/S5
DDR Memory Type	DDR,DDR2,DDR3,DDR3L,DDR4,LPDDR2,LPDDR3
Iout VTT(Max)	3 A
Iq(Typ)	0.5 mA
Operating Temperature Range	-40 to 85 C
Output	VREF,VTT
Package Group	VSON
Package Size: mm2:W x L	10VSON: 9 mm2: 3 x 3(VSON) PKG
Rating	Catalog
Regulator Type	Linear Regulator
Special Features	S3/S5 Support
Vin Bias(Max)	3.5 V
Vin Bias(Min)	2.375 V
Vin(Max)	3.5 V
Vin(Min)	1.1 V
Vout VTT(Min)	0.6 V

Öko-Plan

RoHS

Compliant

Design Kits und Evaluierungsmodule

Evaluation Modules & Boards: TPS51200EVM
TPS51200 Sink Source DDR Termination Regulator
Lifecycle Status: Active (Recommended for new designs)
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Evaluation Modules & Boards: EVMX777BG-01-00-00
J6Entry, RSP and TDA2E-17 CPU Board Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Evaluation Modules & Boards: EVMX777G-01-20-00
J6Entry/RSP Infotainment (CPU+Display+JAMR3) Evaluation Module
Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

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PDF, 251 Kb, Datei veröffentlicht: Mar 31, 2010
This reference design is intended for designers who wish to design a TMS320C6472 Digital Signal Processor into a system using a nominal input voltage of 5 V, DC/DC converters with integrated FETs, and allowing for ease-of-design and a smaller solution size.
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This reference design is intended for designers who wish to design up to eight TMS320C6472 Digital Signal Processors into a system using a nominal input voltage of 12 V, external FETs for design flexibility, and low-dropout regulators for the low-power rails.
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PDF, 558 Kb, Datei veröffentlicht: Apr 28, 2010
This design was created to help designers wishing to design up to eight TMS320C6472 Digital Signal Processors into a system using a nominal input voltage of 12 V, having a highly flexible power design, the ability to monitor temperature, and dynamically monitor and control voltage and current.
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PDF, 245 Kb, Datei veröffentlicht: Mar 26, 2010
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This reference design is intended to help designers wishing to use two of the new Virtex-6™ LX240 FPGA along with DDR memory and other optional circuitry in their designs. It provides nine rails of lower voltage with an input of 12 volts. The use of PTH T2 modules provides a high-performance solution for good transient response and tight regulation while conserving valuable board space.
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Modellreihe

Serie: TPS51200 (4)

TPS51200DRCR TPS51200DRCRG4 TPS51200DRCT TPS51200DRCTG4

Herstellerklassifikation

Semiconductors > Power Management > DDR Memory Power Solutions