Datasheet Texas Instruments LMK04828SNKDTEP — Datenblatt

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SNAS703 – APRIL 2017 LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner
1 Features 2 Applications 1 EP Features
– Gold Bondwires
– Temperature Range: –55 to +105 °C
– Lead Finish SnPb
Maximum Distribution Frequency: 3.2 GHz
JESD204B Support
Ultra-Low RMS Jitter
– 88-fs RMS Jitter (12 kHz to 20 MHz)
– 91-fs RMS Jitter (100 Hz to 20 MHz)
– –162.5 dBc/Hz Noise Floor at 245.76 MHz
Up to 14 Differential Device Clocks From PLL2
– Up to 7 SYSREF Clocks
– Maximum Clock Output Frequency 3.2 GHz
– LVPECL, LVDS, HSDS, LCPECL
Programmable Outputs From PLL2
Up to 1 Buffered VCXO/Crystal Output From PLL1 …