Datasheet Microchip SY89202U — Datenblatt

SY89202U
Precision 1:8 LVPECL Fanout Buffer with
Three Г 1/Г 2/Г 4 Clock Divider Output Banks General Description
The SY89202U is a precision, high-speed, integrated clock
divider LVPECL fanout buffer capable of handling clocks
up to 1.5GHz. Optimized for communications applications,
the three independently controlled output banks are phase
matched and can be configured for pass-through (Г 1), Г 2
or Г 4 divide ratios.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows the user to interface to
any AC-or DC-coupled signal as small as 100mV
(200mVpp) without any level shifting or termination resistor
networks in the signal path. The low skew, low jitter
outputs are 800mV, 100k compatible LVPECL, with
extremely fast rise/fall times guaranteed to be less than
220ps.
The EN (enable) input guarantees that the Г 1, Г 2 and Г 4
outputs will start from the same state without any runt
pulse after an asynchronous MR (master reset) is
asserted. This is accomplished by enabling the outputs
after a four-clock delay to allow the counters to
synchronize. …