Datasheet Microchip PL138-48 — Datenblatt

HerstellerMicrochip
SeriePL138-48

Die PL138-48-Familie ist ein leistungsstarker, kostengünstiger 1: 4-Ausgang mit differenziellem LVPECL-Fanout-Puffer

Datenblätter

PL138-48 - 2.5V-3.3V Low-Skew 1-4 Differential PECL Fanout Buffer
PDF, 618 Kb, Datei veröffentlicht: Jun 20, 2016
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Preise

Status

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Verpackung

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
N1234
PackageTSSOPTSSOPTSSOPTSSOP
Pins20202020

Parameter

Parameters / ModelsPL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
Description2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter
Input MuxYesYesYesYes
Input TypeLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSL
Operating Temperature Range, °C0 to +700 to +70-40 to +85-40 to +85
Output Frequency, Max1111
Output TypeLVPECLLVPECLLVPECLLVPECL
Supply Voltage, V2.5V, 3.3V2.5V, 3.3V2.5V, 3.3V2.5V, 3.3V
Within Device Skew, Max25252525

Öko-Plan

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
RoHSCompliantCompliantCompliantCompliant

Modellreihe

Herstellerklassifikation

  • Clock and Timing > Clock and Data Distribution > Fanout Buffers