Datasheet Linear Technology LTC4304 — Datenblatt

Hersteller	Linear Technology
Serie	LTC4304

Hot-Swap-fähiger 2-Draht-Buspuffer mit festsitzender Buswiederherstellung

Datenblätter

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PDF, 660 Kb, Sprache: en, Datei hochgeladen: Nov 16, 2017, Seiten: 16
Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery

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Verpackung

	LTC4304CDD#PBF	LTC4304CDD#TRPBF	LTC4304CMS#PBF	LTC4304CMS#TRPBF	LTC4304IDD#PBF	LTC4304IDD#TRPBF	LTC4304IMS#PBF	LTC4304IMS#TRPBF
N	1	2	3	4	5	6	7	8
Package	3x3 DFN-10 Paketumrisszeichnung	3x3 DFN-10 Paketumrisszeichnung	MS-10 Paketumrisszeichnung	MS-10 Paketumrisszeichnung	3x3 DFN-10 Paketumrisszeichnung	3x3 DFN-10 Paketumrisszeichnung	MS-10 Paketumrisszeichnung	MS-10 Paketumrisszeichnung
Package Code	DD	DD	MS	MS	DD	DD	MS	MS
Package Index	05-08-1699	05-08-1699	05-08-1661	05-08-1661	05-08-1699	05-08-1699	05-08-1661	05-08-1661
Pin Count	10	10	10	10	10	10	10	10

Parameter

Parameters / Models	LTC4304CDD#PBF	LTC4304CDD#TRPBF	LTC4304CMS#PBF	LTC4304CMS#TRPBF	LTC4304IDD#PBF	LTC4304IDD#TRPBF	LTC4304IMS#PBF	LTC4304IMS#TRPBF
Data Rate, kHz	400	400	400	400	400	400	400	400
ESD, kV	15	15	15	15	15	15	15	15
Enable	yes	yes	yes	yes	yes	yes	yes	yes
Export Control	no	no	no	no	no	no	no	no
Function	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator
I2C Hot Swappable	yes	yes	yes	yes	yes	yes	yes	yes
Level Translation	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V	2.7V/5.5V
Number of Supplies	1	1	1	1	1	1	1	1
Operating Temperature Range, °C	0 to 70	0 to 70	0 to 70	0 to 70	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Ready	yes	yes	yes	yes	yes	yes	yes	yes
Rise Time Accelerator	yes	yes	yes	yes	yes	yes	yes	yes
Stuck Bus	yes	yes	yes	yes	yes	yes	yes	yes

Öko-Plan

	LTC4304CDD#PBF	LTC4304CDD#TRPBF	LTC4304CMS#PBF	LTC4304CMS#TRPBF	LTC4304IDD#PBF	LTC4304IDD#TRPBF	LTC4304IMS#PBF	LTC4304IMS#TRPBF
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

Artikel

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I2C Bus Buffer Resolves Stuck Buses, Eliminates Heavy Load Limitations and Provides Level Translation &mdash LT Journal
PDF, 162 Kb, Datei veröffentlicht: Mar 28, 2006
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L DESIGN FEATURES I2C Bus Buffer Resolves Stuck Buses,
Eliminates Heavy Load Limitations
and Provides Level Translation
by George Humphrey Introduction
The I2C bus is a 2-wire bidirectional communications bus primarily
used for system conп¬Ѓguration and
monitoring. A bus master, typically
a microcontroller unit (MCU), polls
system components for information
such as supply voltage and temperature, Vital Product Data (VPD) from
memories on removable cards, and
system conп¬Ѓguration. The master
can also use the bus to reconп¬Ѓgure
the system through general purpose
BACKPLANE input/output ports (GPIOs) and other
programmable devices. Large-scale
telecommunication and data storage
systems are divided up into several
peripheral cards. Each card plugs
on to the I2C bus and communicates
its system information to the MCU
through the back plane.
Certain considerations must be …

Modellreihe

Serie: LTC4304 (8)

LTC4304CDD#PBF LTC4304CDD#TRPBF LTC4304CMS#PBF LTC4304CMS#TRPBF LTC4304IDD#PBF LTC4304IDD#TRPBF LTC4304IMS#PBF LTC4304IMS#TRPBF

Herstellerklassifikation

Interface > I2C and SMBus Bus Buffers and Accelerators

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Datenblätter Datasheet Analog Devices LTC4304

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