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  I2C Bus Buffer Resolves Stuck Buses, Eliminates Heavy Load Limitations and Provides Level Translation &mdash LT Journal
  PDF, 162 Kb, Datei veröffentlicht: Mar 28, 2006
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  L DESIGN FEATURES I2C Bus Buffer Resolves Stuck Buses,
  Eliminates Heavy Load Limitations
  and Provides Level Translation
  by George Humphrey Introduction
  The I2C bus is a 2-wire bidirectional communications bus primarily
  used for system configuration and
  monitoring. A bus master, typically
  a microcontroller unit (MCU), polls
  system components for information
  such as supply voltage and temperature, Vital Product Data (VPD) from
  memories on removable cards, and
  system configuration. The master
  can also use the bus to reconfigure
  the system through general purpose
  BACKPLANE input/output ports (GPIOs) and other
  programmable devices. Large-scale
  telecommunication and data storage
  systems are divided up into several
  peripheral cards. Each card plugs
  on to the I2C bus and communicates
  its system information to the MCU
  through the back plane.
  Certain considerations must be …

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• Interface > I2C and SMBus Bus Buffers and Accelerators

Andere Namen:

LTC4304CDDPBF, LTC4304CDD PBF