Datasheet Microchip MIC58P01 — Datenblatt
| Hersteller | Microchip |
| Serie | MIC58P01 |
Der gesperrte Treiber MIC58P01 mit parallelem Eingang ist eine integrierte Hochspannungs- (80 V) Hochstromschaltung (500 mA), die aus acht CMOS-Daten-Latches, einem bipolaren Darlington-Transistortreiber für jeden Latch und einer CMOS-Steuerschaltung für das gemeinsame CLEAR STROBE besteht und OUTPUT ENABLE-Funktionen
Datenblätter
Status
| MIC58P01YN | MIC58P01YV | MIC58P01YV-TR | MIC58P01YWM | MIC58P01YWM-TR | |
|---|---|---|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Verpackung
| MIC58P01YN | MIC58P01YV | MIC58P01YV-TR | MIC58P01YWM | MIC58P01YWM-TR | |
|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 |
| Package | PDIP | PLCC | PLCC | SOIC | SOIC |
| Pins | 22 | 28 | 28 | 24 | 24 |
Parameter
| Parameters / Models | MIC58P01YN | MIC58P01YV | MIC58P01YV-TR | MIC58P01YWM | MIC58P01YWM-TR |
|---|---|---|---|---|---|
| General Description | 8-Bit SRs (Cascadable), Operable w/Split Supply (to -20V), 3.3MHz (min) Data@5V, Higher @12V, Low Power Logic - TTL/CMOS/PMOS/NMOS; Internal Pull Up/Dwn Res’s | 8-Bit SRs (Cascadable), Operable w/Split Supply (to -20V), 3.3MHz (min) Data@5V, Higher @12V, Low Power Logic - TTL/CMOS/PMOS/NMOS; Internal Pull Up/Dwn Res’s | 8-Bit SRs (Cascadable), Operable w/Split Supply (to -20V), 3.3MHz (min) Data@5V, Higher @12V, Low Power Logic - TTL/CMOS/PMOS/NMOS; Internal Pull Up/Dwn Res’s | 8-Bit SRs (Cascadable), Operable w/Split Supply (to -20V), 3.3MHz (min) Data@5V, Higher @12V, Low Power Logic - TTL/CMOS/PMOS/NMOS; Internal Pull Up/Dwn Res’s | 8-Bit SRs (Cascadable), Operable w/Split Supply (to -20V), 3.3MHz (min) Data@5V, Higher @12V, Low Power Logic - TTL/CMOS/PMOS/NMOS; Internal Pull Up/Dwn Res’s |
| Input Structure | Parallel | Parallel | Parallel | Parallel | Parallel |
| Iout, mA) per Channel | 500 | 500 | 500 | 500 | 500 |
| Minimum Data Clock, MHz | -- | -- | -- | -- | -- |
| Operating Temperature Range, °C | -40 to +85 | -40 to +85 | -40 to +85 | -40 to +85 | |
| Output Channels | 8 | 8 | 8 | 8 | 8 |
| Output Structure | Darlington Open Collector | Darlington Open Collector | Darlington Open Collector | Darlington Open Collector | Darlington Open Collector |
| Type | Sink | Sink | Sink | Sink | Sink |
| Vout Operating, V) - Sustained | 80 | 80 | 80 | 80 | 80 |
Öko-Plan
| MIC58P01YN | MIC58P01YV | MIC58P01YV-TR | MIC58P01YWM | MIC58P01YWM-TR | |
|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant |
Modellreihe
Serie: MIC58P01 (5)