Datasheet Microchip VN3205 — Datenblatt
| Hersteller | Microchip |
| Serie | VN3205 |
Dieser Transistor im Enhancement-Mode (normalerweise ausgeschaltet) verwendet eine vertikale DMOS-Struktur und ein bewährtes Silizium-Gate-Herstellungsverfahren
Datenblätter
VN3205 Datasheet - N-Channel Enhancement-Mode Vertical DMOS FET
PDF, 713 Kb, Revision: 06-22-2014
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Status
| VN3205N3-G | VN3205N3-G-P002 | VN3205N8-G | |
|---|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Verpackung
| VN3205N3-G | VN3205N3-G-P002 | VN3205N8-G | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Package | TO-92 | TO-92 | SOT-89 |
| Pins | 3 | 3 | 3 |
Parameter
| Parameters / Models | VN3205N3-G | VN3205N3-G-P002 | VN3205N8-G |
|---|---|---|---|
| BVdss min, V | 50 | 50 | 50 |
| CISSmax, pF | 300 | 300 | 300 |
| Operating Temperature Range, °C | -55 to +150 | -55 to +150 | -55 to +150 |
| Rds, on) max | 0.3 | 0.3 | 0.3 |
| Vgs(th) max, V | 2.4 | 2.4 | 2.4 |
Öko-Plan
| VN3205N3-G | VN3205N3-G-P002 | VN3205N8-G | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Modellreihe
Serie: VN3205 (3)