Datasheet Microchip PIC18F24K42-E/SO — Datenblatt

PIC18(L)F24/25K42
28-Pin, Low-Power High-Performance Microcontrollers with
XLP Technology
Description
The PIC18(L)F24/25K42 microcontrollers are available in 28-pin devices. These devices feature a 12-bit ADC with
Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging,
filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency
for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous,
DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support
customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory
calibration values to help improve temperature sensor accuracy. Core Features Memory • C Compiler Optimized RISC Architecture
• Operating Speed:
-Up to 64 MHz clock input
-62.5 ns minimum instruction cycle
• Two Direct Memory Access (DMA) Controllers
-Data transfers to SFR/GPR spaces from
either Program Flash Memory, Data
EEPROM or SFR/GPR spaces
-User-programmable source and destination
sizes
-Hardware and software-triggered data
transfers
• System Bus Arbiter with User-Configurable …

PIC18F24/25K42
28-Pin, Low-Power High-Performance High-Temperature Microcontrollers
Description
The PIC18F24/25K42 microcontrollers are available in 28-pin devices. These devices feature a 12-bit ADC with
Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging,
filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency
for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous,
DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support
customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory
calibration values to help improve temperature sensor accuracy. Core Features Memory • C Compiler Optimized RISC Architecture
• Operating Speed:
-Up to 64 MHz clock input
-62.5 ns minimum instruction cycle
• Two Direct Memory Access (DMA) Controllers:
-Data transfers to SFR/GPR spaces from
either Program Flash Memory, Data
EEPROM or SFR/GPR spaces
-User-programmable source and destination
sizes
-Hardware and software-triggered data
transfers
• System Bus Arbiter with User-Configurable
Priorities for Scanner and DMA1/DMA2 with …

PIC18(L)F24/25K42
28-Pin, Low-Power High-Performance Microcontrollers with
XLP Technology
Description
The PIC18(L)F24/25K42 microcontrollers are available in 28-pin devices. These devices feature a 12-bit ADC with
Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging,
filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency
for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous,
DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support
customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory
calibration values to help improve temperature sensor accuracy. Core Features Memory • C Compiler Optimized RISC Architecture
• Operating Speed:
-Up to 64 MHz clock input
-62.5 ns minimum instruction cycle
• Two Direct Memory Access (DMA) Controllers
-Data transfers to SFR/GPR spaces from
either Program Flash Memory, Data
EEPROM or SFR/GPR spaces
-User-programmable source and destination
sizes
-Hardware and software-triggered data
transfers
• System Bus Arbiter with User-Configurable …

PIC18(L)F24/25K42
28-Pin, Low-Power, High-Performance Microcontrollers
with XLP Technology
Description
The PIC18(L)F24/25K42 microcontroller family is available in 28-pin devices. This family features a 12-bit ADC with
Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging,
filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency
for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous,
DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support
customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory
calibration values to help improve temperature sensor accuracy. Core Features Memory C Compiler Optimized RISC Architecture Operating Speed:
-Up to 64 MHz clock input
-62.5 ns minimum instruction cycle Two Direct Memory Access (DMA) Controllers
-Data transfers to SFR/GPR spaces from
either Program Flash Memory, Data
EEPROM or SFR/GPR spaces
-User-programmable source and destination
sizes
-Hardware and software-triggered data
transfers System Bus Arbiter with User-Configurable
Priorities for Scanner and DMA1/DMA2 with
respect to the main line and interrupt execution Vectored Interrupt Capability
-Selectable high/low priority …