Datasheet Microchip ATXMEGA16A4U-MHR — Datenblatt

8-bit Atmel XMEGA AU Microcontroller XMEGA AU MANUAL This document contains complete and detailed description of all modules included in
the AtmelВ®AVRВ®XMEGAВ®AU microcontroller family. The Atmel AVR XMEGA AU is a
family of low-power, high-performance, and peripheral-rich CMOS 8/16-bit
microcontrollers based on the AVR enhanced RISC architecture. The available Atmel
AVR XMEGA AU modules described in this manual are:
пЃ¬ Atmel AVR CPU
пЃ¬ Memories
пЃ¬ DMAC -Direct memory access controller
пЃ¬ Event system
пЃ¬ System clock and clock options
пЃ¬ Power management and sleep modes
пЃ¬ System control and reset
пЃ¬ Battery backup system
пЃ¬ WDT -Watchdog timer
пЃ¬ Interrupts and programmable multilevel interrupt controller
пЃ¬ PORT -I/O ports
пЃ¬ TC -16-bit timer/counters
пЃ¬ AWeX -Advanced waveform extension
пЃ¬ Hi-Res -High resolution extension
пЃ¬ RTC -Real-time counter
пЃ¬ RTC32 -32-bit real-time counter
пЃ¬ USB -Universal serial bus interface
пЃ¬ TWI -Two-wire serial interface …

8/16-bit Atmel XMEGA Microcontroller ATxmega128A4U / ATxmega64A4U /
ATxmega32A4U / ATxmega16A4U
Features
z High-performance, low-power AtmelВ® AVRВ® XMEGAВ® 8/16-bit Microcontroller
z Nonvolatile program and data memories 16K -128KB of in-system self-programmable flash
4K -8KB boot section
1K -2KB EEPROM
2K -8KB internal SRAM
Peripheral Features
z Four-channel DMA controller
z Eight-channel event system
z Five 16-bit timer/counters
z Three timer/counters with 4 output compare or input capture channels
z Two timer/counters with 2 output compare or input capture channels
z High-resolution extensions on all timer/counters
z Advanced waveform extension (AWeX) on one timer/counter
z One USB device interface
z USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant
z 32 Endpoints with full configuration flexibility
z Five USARTs with IrDA support for one USART
z Two Two-wire interfaces with dual address match (I2C and SMBus compatible)
z Two serial peripheral interfaces (SPIs)
z AES and DES crypto engine …