Datasheet Analog Devices AD7277AUJZ-500RL7 — Datenblatt

FEATURES FUNCTIONAL BLOCK DIAGRAM
VDD Throughput rate: 3 MSPS
Specified for VDD of 2.35 V to 3.6 V
Power consumption
12.6 mW at 3 MSPS with 3 V supplies
Wide input bandwidth
70 dB SNR at 1 MHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI-/QSPI™-/MICROWIRE™-/DSP compatible
Temperature range: −40°C to +125°C
Power-down mode: 0.1 µA typical
6-lead TSOT package
8-lead MSOP package
AD7476 and AD7476A pin compatible VIN 12-/10-/8-BIT
SUCCESSIVE
APPROXIMATION
ADC SCLK AD7276/
AD7277/
AD7278 CONTROL
LOGIC SDATA
CS GND Figure 1. GENERAL DESCRIPTION …